CFP last date
22 April 2024
Reseach Article

Hardware-software co-design for various Parallel applications using the Concept of Dynamic Partial Reconfiguration at FPGA Partitions

by D.S.Ravi Kumar, P. Naveen Kumar
journal cover thumbnail
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 1 - Number 26
Year of Publication: 2010
Authors: D.S.Ravi Kumar, P. Naveen Kumar
10.5120/484-794

D.S.Ravi Kumar, P. Naveen Kumar . Hardware-software co-design for various Parallel applications using the Concept of Dynamic Partial Reconfiguration at FPGA Partitions. International Journal of Computer Applications. 1, 26 ( February 2010), 26-29. DOI=10.5120/484-794

@article{ 10.5120/484-794,
author = { D.S.Ravi Kumar, P. Naveen Kumar },
title = { Hardware-software co-design for various Parallel applications using the Concept of Dynamic Partial Reconfiguration at FPGA Partitions },
journal = { International Journal of Computer Applications },
issue_date = { February 2010 },
volume = { 1 },
number = { 26 },
month = { February },
year = { 2010 },
issn = { 0975-8887 },
pages = { 26-29 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume1/number26/484-794/ },
doi = { 10.5120/484-794 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T19:48:47.554519+05:30
%A D.S.Ravi Kumar
%A P. Naveen Kumar
%T Hardware-software co-design for various Parallel applications using the Concept of Dynamic Partial Reconfiguration at FPGA Partitions
%J International Journal of Computer Applications
%@ 0975-8887
%V 1
%N 26
%P 26-29
%D 2010
%I Foundation of Computer Science (FCS), NY, USA
Abstract

In this paper an effective hardware design methodology for the devices like mobile phones, digital cameras, etc is described. In those devices only few applications are running at given time. So it requires only few hardware blocks to be active. This design approach is based on the idea of configuring and programming the hardware of active application whenever required at a single Field Programmable Gate Array (FPGA) chip.

References
  1. G. De Michell, and R.K. Gupta, “ Hardware/software co-design,” in the Proceedings of IEEE, vol.85, no.3, pp. 349-365, March 1997.
  2. www.actel.com for Actel FPGA architecture and programming
  3. www.xilinx.com for Xilinx FPGA architecture
Index Terms

Computer Science
Information Sciences

Keywords

co-design Parallel applications Dynamic Partial Reconfiguration FPGA Partitions