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Review of Quaternary Adders in Voltage Mode Multi-Valued Logic

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IJCA Special Issue on Recent Trends in Engineering Technology
© 2013 by IJCA Journal
RETRET
Year of Publication: 2013
Authors:
Neha W. Umredkar
M. A. Gaikwad
D. R. Dandekar

Neha W Umredkar, M A Gaikwad and D R Dandekar. Article: Review of Quaternary Adders in Voltage Mode Multi-Valued Logic. IJCA Special Issue on Recent Trends in Engineering Technology RETRET:17-21, March 2013. Full text available. BibTeX

@article{key:article,
	author = {Neha W. Umredkar and M. A. Gaikwad and D. R. Dandekar},
	title = {Article: Review of Quaternary Adders in Voltage Mode Multi-Valued Logic},
	journal = {IJCA Special Issue on Recent Trends in Engineering Technology},
	year = {2013},
	volume = {RETRET},
	pages = {17-21},
	month = {March},
	note = {Full text available}
}

Abstract

The Binary logic circuits design is limited by the requirement of number of interconnections which increases the chip area with increase in logic. Multi valued logic designs are gaining importance form that perspective. Adders are one of the important part of the processing element and hence it has a focus of research. Therefore design of adders using multi valued logic can prove to be very useful. Thus there is a need to design a optimal adder. In this paper we review Quaternary Adders circuit. The proposed adders are to be design in Multi-Valued Voltage Mode Logic and investigate the effect of one parameter on another. Optimized adders will be designed, analyzed and proposed for multi-valued logic arithmetic unit design which will achieve the practical ranges of parameters of circuit.

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