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Review of Mesh Topology of NoC Architecture using Source Routing Algorithms

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IJCA Special Issue on Recent Trends in Engineering Technology
© 2013 by IJCA Journal
RETRET
Year of Publication: 2013
Authors:
Vaishali V. Ingle
Mahendra A. Gaikwad

Vaishali V Ingle and Mahendra A.gaikwad. Article: Review of Mesh Topology of NoC Architecture using Source Routing Algorithms. IJCA Special Issue on Recent Trends in Engineering Technology RETRET:30-34, March 2013. Full text available. BibTeX

@article{key:article,
	author = {Vaishali V. Ingle and Mahendra A.gaikwad},
	title = {Article: Review of Mesh Topology of NoC Architecture using Source Routing Algorithms},
	journal = {IJCA Special Issue on Recent Trends in Engineering Technology},
	year = {2013},
	volume = {RETRET},
	pages = {30-34},
	month = {March},
	note = {Full text available}
}

Abstract

NoC is efficient on-chip communication architecture for SoC architectures. It enables integration of a large number of computational and storage blocks on a single chip. NoCs have tackled the SoCs many disadvantages and are structured, reusable, scalable, and have high performance. Lots of topologies have been proposed for NoCs. Among these topologies, mesh topology has gained more consideration by designers due to its simplicity. A 2D-mesh topology is one of the most frequently mentioned topologies for an NoC design due to its natural layout mapping onto an SoC. Thus, the 2D mesh network on chip (NoC) is a popular NoC topology because of network scalability and the use of a simple routing algorithm. In this paper, we compare popular mesh with the other NoC topologies in terms of different performance metrics such as, latency, power consumption, and power/throughput ratio under different routing algorithms.

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