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Reseach Article

Design of System on Chip for Generating SYN Flood Attack to Test the Performance of the Security System

by Shaila R Ghanti, G.m.naik
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 122 - Number 7
Year of Publication: 2015
Authors: Shaila R Ghanti, G.m.naik
10.5120/21711-4831

Shaila R Ghanti, G.m.naik . Design of System on Chip for Generating SYN Flood Attack to Test the Performance of the Security System. International Journal of Computer Applications. 122, 7 ( July 2015), 14-17. DOI=10.5120/21711-4831

@article{ 10.5120/21711-4831,
author = { Shaila R Ghanti, G.m.naik },
title = { Design of System on Chip for Generating SYN Flood Attack to Test the Performance of the Security System },
journal = { International Journal of Computer Applications },
issue_date = { July 2015 },
volume = { 122 },
number = { 7 },
month = { July },
year = { 2015 },
issn = { 0975-8887 },
pages = { 14-17 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume122/number7/21711-4831/ },
doi = { 10.5120/21711-4831 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T23:11:25.601870+05:30
%A Shaila R Ghanti
%A G.m.naik
%T Design of System on Chip for Generating SYN Flood Attack to Test the Performance of the Security System
%J International Journal of Computer Applications
%@ 0975-8887
%V 122
%N 7
%P 14-17
%D 2015
%I Foundation of Computer Science (FCS), NY, USA
Abstract

DDoS attack is generated by the attacker on the server, so that the genuine clients will not have access to the services provided by server. To protect servers from such attacks, large variety of security systems are available. The best security system can be selected by comparing the performance of these systems. There is a need to generate attacks at very high speed to test the performance of security system. This manuscript presents the design of FPGA based reconfigurable hardware System-on-Chip (SoC), that can generate the SYN flood attacks at high speed in real time. The SoC SYN flood attack is implemented using the soft core NIOS II processor, Triple_Speed Ethernet, etc. The manuscript also compares the attacks generated using such hardware based SoC SYN flood attacker with the SYN flood attacks generated using purely software based tool hping3. It is found that the attacks generated using FPGA based system is much faster than software based tool. The same hardware design can be used to generate many different types of attacks such as spoofed, non-spoofed, layer 3 , layer 4 attacks like TCP flood attack, UDP attack, ICMP flood attack, TCP SYN-ACK attack, TCP FIN-ACK attack, etc. Such attacks are essential to benchmark the security systems. The proposed technique can be used as industry standard to benchmark the performance of the security systems.

References
  1. Neustar Annual DDoS Attacks and Impact Report "THE DANGER DEEPENS" 2014 http://www. neustar. biz/resources/whitepapers/ddos-protection/2014-annual-ddos-attacks-and-impact-report. pdf
  2. "Download Hping3 source code" . http://www. hping. org/download. html
  3. "Introduction to FPGA Technology: Top 5 Benefits" http://www. ni. com/white-paper/6984/en/, Publish Date: Apr 16, 2012 | 52 Ratings | 3. 69 out of 5
  4. Andrew S. Tanenbaum, "Computer Networks", 4th edition
  5. "Learn" "Enhance" "download Wireshark" . http://www. wireshark. org/
  6. Prof Bill Buchanan, Flavien Flandrin, Richard Macfarlane, Dr Jamie Graves, Edinburgh Napier University, 10 Colinton Road, Edinburgh, EH10 5DT, "A Methodology to Evaluate Rate-Based Intrusion Prevention System against Distributed Denial-of-Service (DDoS)"
  7. Venkata Yellapragada, Venkat Gaddam, shripal Pandey a project report on "Network Packet generators" April 17, 2009
  8. G. Adam Covington, Glen Gibb, John W. Lockwood, Nick McKeown, " A Packet Generator on the NetFPGA Platform" http://yuba. stanford. edu/netfpga/documents/NetFPGA-FCCM-2009-Packet_Generator. pdf
  9. "Triple-Speed Ethernet Megacore Function user Guide" www. altera. com/literature/ug/ug_ethernet. pdf Document last updated for Altera Complete Design Suite version:13. 0 Document publication date: May 2013
  10. Using Triple-Speed Ethernet on DE4 Boards. ftp://ftp. altera. com/up/pub/Altera_Material/12. 0/Tutorials/DE4/using_triple_speed_ethernet. pdf
  11. Jami Aditya and Priyanka Priyadarsini, "Application of Ethernet over powerline Communication" Department of Electronics and Communication Engineering National Institute of Technology, Rourkela May, 2013. http://ethesis. nitrkl. ac. in/4695/http://generalengineering. sjsu. edu/docs/pdf/mse_prj_rpts/spring2009/Network%20Packet%20Generator_By_Pandya_etal_EMD. pdf
  12. "The TCP/IP Guide–A TCP/IP Reference you can understand" http://www. tcpipguide. com/free/index. htm
  13. "Free Software download" Xampp webserver http://download. cnet. com/BitNami-for-XAMPP/3001-2070_4-75924895. html?hlndr=1
Index Terms

Computer Science
Information Sciences

Keywords

FPGA NIOS II processor Packet generation SYN flood attack Triple-Speed Ethernet etc