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Reseach Article

Compact and High Speed Hardware Implementation of the Block- Cipher Clefia

by V.A. Suryawanshi, G.C. Manna, S.S. Dorale
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 133 - Number 8
Year of Publication: 2016
Authors: V.A. Suryawanshi, G.C. Manna, S.S. Dorale
10.5120/ijca2016907937

V.A. Suryawanshi, G.C. Manna, S.S. Dorale . Compact and High Speed Hardware Implementation of the Block- Cipher Clefia. International Journal of Computer Applications. 133, 8 ( January 2016), 17-20. DOI=10.5120/ijca2016907937

@article{ 10.5120/ijca2016907937,
author = { V.A. Suryawanshi, G.C. Manna, S.S. Dorale },
title = { Compact and High Speed Hardware Implementation of the Block- Cipher Clefia },
journal = { International Journal of Computer Applications },
issue_date = { January 2016 },
volume = { 133 },
number = { 8 },
month = { January },
year = { 2016 },
issn = { 0975-8887 },
pages = { 17-20 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume133/number8/23807-2016907937/ },
doi = { 10.5120/ijca2016907937 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T23:30:36.762210+05:30
%A V.A. Suryawanshi
%A G.C. Manna
%A S.S. Dorale
%T Compact and High Speed Hardware Implementation of the Block- Cipher Clefia
%J International Journal of Computer Applications
%@ 0975-8887
%V 133
%N 8
%P 17-20
%D 2016
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Main fundamental directions which are considered as important for practical ciphers are (1) security, (2) speed, and (3) cost for implementations. To realize these fundamental directions CLEFIA is designed. Clefia is a first block cipher employing the Diffusion Switching Mechanism (DSM) to enhance the immunity against the differential attack and the linear attack. Clefia uses lightweight components for efficient software and hardware implementations. This paper proposes compact and high speed hardware implementation for block cipher clefia-128. This hardware architecture uses minimum hardware resources and maximum frequency of 135.452 Mhz, through which we can achieve a throughputs of 17 Gbit/s

References
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Index Terms

Computer Science
Information Sciences

Keywords

Clefia DSM Encryption FPGA and VHDL