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Implementation and Analysis of Optimized AES on FPGA

by Nikita Purohit, Meghana A. Hasamnis
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 169 - Number 10
Year of Publication: 2017
Authors: Nikita Purohit, Meghana A. Hasamnis
10.5120/ijca2017914899

Nikita Purohit, Meghana A. Hasamnis . Implementation and Analysis of Optimized AES on FPGA. International Journal of Computer Applications. 169, 10 ( Jul 2017), 28-30. DOI=10.5120/ijca2017914899

@article{ 10.5120/ijca2017914899,
author = { Nikita Purohit, Meghana A. Hasamnis },
title = { Implementation and Analysis of Optimized AES on FPGA },
journal = { International Journal of Computer Applications },
issue_date = { Jul 2017 },
volume = { 169 },
number = { 10 },
month = { Jul },
year = { 2017 },
issn = { 0975-8887 },
pages = { 28-30 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume169/number10/28022-2017914899/ },
doi = { 10.5120/ijca2017914899 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-07T00:17:04.089454+05:30
%A Nikita Purohit
%A Meghana A. Hasamnis
%T Implementation and Analysis of Optimized AES on FPGA
%J International Journal of Computer Applications
%@ 0975-8887
%V 169
%N 10
%P 28-30
%D 2017
%I Foundation of Computer Science (FCS), NY, USA
Abstract

In today’s world of digital transmission and reception of data and images high performance processing hardware is required. This paper presents an optimized AES algorithm for both software and hardware implementation through which the execution speed of the process is improved by reducing the cycle count. Optimized AES is implemented using soft-core processor on FPGA Spartan-6 kit and the results are obtained using timing analyzer tool of Xilinx design suite 14.5. The execution time for hardware implementation of optimized AES code is improved by 12.46% and 11.58% for encryption and decryption module respectively. Target device used for implementation of design is XILINX 14.5 platform studio xc6slx45-2csg324.

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Index Terms

Computer Science
Information Sciences

Keywords

FPGA-Spartan 6 Cryptography AES.

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