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Reseach Article

Analysis of 64- bit RC5 Encryption Algorithm for Pipelined Architecture

by Ashmi Singh, Puran Gour, Braj Bihari Soni
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 96 - Number 20
Year of Publication: 2014
Authors: Ashmi Singh, Puran Gour, Braj Bihari Soni
10.5120/16912-7004

Ashmi Singh, Puran Gour, Braj Bihari Soni . Analysis of 64- bit RC5 Encryption Algorithm for Pipelined Architecture. International Journal of Computer Applications. 96, 20 ( June 2014), 26-31. DOI=10.5120/16912-7004

@article{ 10.5120/16912-7004,
author = { Ashmi Singh, Puran Gour, Braj Bihari Soni },
title = { Analysis of 64- bit RC5 Encryption Algorithm for Pipelined Architecture },
journal = { International Journal of Computer Applications },
issue_date = { June 2014 },
volume = { 96 },
number = { 20 },
month = { June },
year = { 2014 },
issn = { 0975-8887 },
pages = { 26-31 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume96/number20/16912-7004/ },
doi = { 10.5120/16912-7004 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T22:22:18.228611+05:30
%A Ashmi Singh
%A Puran Gour
%A Braj Bihari Soni
%T Analysis of 64- bit RC5 Encryption Algorithm for Pipelined Architecture
%J International Journal of Computer Applications
%@ 0975-8887
%V 96
%N 20
%P 26-31
%D 2014
%I Foundation of Computer Science (FCS), NY, USA
Abstract

In modern days data transmission through a channel requires more security. Security based more important transmission is comparatively better & believable than simple transmission. The aim of this work to use RC5 algorithm for encryption and decryption of data for secure data transmission from one place to another place for proper communication purposes. Today this is utmost importance to send information confidentially through network without any risk for hackers or unauthorized possibility to access from the network. This urgently require security implementation devices in network for well secured transmission of data. Symmetric encryption cores provide data protection through the use of secret key only known as encryption, whereas decryption deals with the yield at the end of communication path. Today world require secure transmission through cryptographic algorithm. Keeping view in mind the proposed well defined RC5 architecture have been taken, based on the fact for suitability of each operation for encryption, high speed processing and possibility of area reduction. The work results of the study clearly indicate that logic implementation by this hardware is maximum clock frequency of 179 MHz and areas reduced to 50% as compare with the results of design of previous worker. The propose design is described in verilog, synthesized by Xilinx synthesis technology.

References
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Index Terms

Computer Science
Information Sciences

Keywords

RC5 Encryption pipeline Verilog HDL