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Analysing the Performance of Multi-core Architecture

Published on March 2013 by Ram Prasad Mohanty, Ashok Kumar Turuk, Bibhudatta Sahoo
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International Conference on Computing, Communication and Sensor Network
Foundation of Computer Science USA
CCSN2012 - Number 4
March 2013
Authors: Ram Prasad Mohanty, Ashok Kumar Turuk, Bibhudatta Sahoo
36b20f7b-1455-4187-bba7-8c76f8dda5c7

Ram Prasad Mohanty, Ashok Kumar Turuk, Bibhudatta Sahoo . Analysing the Performance of Multi-core Architecture. International Conference on Computing, Communication and Sensor Network. CCSN2012, 4 (March 2013), 28-33.

@article{
author = { Ram Prasad Mohanty, Ashok Kumar Turuk, Bibhudatta Sahoo },
title = { Analysing the Performance of Multi-core Architecture },
journal = { International Conference on Computing, Communication and Sensor Network },
issue_date = { March 2013 },
volume = { CCSN2012 },
number = { 4 },
month = { March },
year = { 2013 },
issn = 0975-8887,
pages = { 28-33 },
numpages = 6,
url = { /specialissues/ccsn2012/number4/10875-1041/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Special Issue Article
%1 International Conference on Computing, Communication and Sensor Network
%A Ram Prasad Mohanty
%A Ashok Kumar Turuk
%A Bibhudatta Sahoo
%T Analysing the Performance of Multi-core Architecture
%J International Conference on Computing, Communication and Sensor Network
%@ 0975-8887
%V CCSN2012
%N 4
%P 28-33
%D 2013
%I International Journal of Computer Applications
Abstract

The advancement in technology has brought immense amount of changes in the design and productivity of applications designed for being used in the personal computers. By implementing greater number of cores to the same chip also results in facing challenges. In this case the challenge that is being faced is the core to core communication as well as the memory in addition to cache coherence. This paper presents a detailed analysis on performance of FFT a divide and conquer algorithm across with the Multi-core architecture with Internal and external network. The architectures are being defined using memory configuration and context configuration with help of Multi2Sim 3. 4 simulator. The performance of these architectures have been simulated with Splash 2 Benchmark.

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Index Terms

Computer Science
Information Sciences

Keywords

Multi-core Technology Multi-core Issues Splash2 Benchmark Performance Multi2sim Simulator