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Reseach Article

Escape Path based Irregular Network-on-chip Simulation Framework

Published on None 2011 by Naveen Choudhary, M. S. Gaur, V. Laxmi
Evolution in Networks and Computer Communications
Foundation of Computer Science USA
ENCC - Number 1
None 2011
Authors: Naveen Choudhary, M. S. Gaur, V. Laxmi
5ddf50fe-b048-4d6c-95e1-bc0de3dd153c

Naveen Choudhary, M. S. Gaur, V. Laxmi . Escape Path based Irregular Network-on-chip Simulation Framework. Evolution in Networks and Computer Communications. ENCC, 1 (None 2011), 7-12.

@article{
author = { Naveen Choudhary, M. S. Gaur, V. Laxmi },
title = { Escape Path based Irregular Network-on-chip Simulation Framework },
journal = { Evolution in Networks and Computer Communications },
issue_date = { None 2011 },
volume = { ENCC },
number = { 1 },
month = { None },
year = { 2011 },
issn = 0975-8887,
pages = { 7-12 },
numpages = 6,
url = { /specialissues/encc/number1/3713-encc002/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Special Issue Article
%1 Evolution in Networks and Computer Communications
%A Naveen Choudhary
%A M. S. Gaur
%A V. Laxmi
%T Escape Path based Irregular Network-on-chip Simulation Framework
%J Evolution in Networks and Computer Communications
%@ 0975-8887
%V ENCC
%N 1
%P 7-12
%D 2011
%I International Journal of Computer Applications
Abstract

Network-on-Chip(NoC) has been proposed as a solution for addressing the communication infrastructure design challenges of future high-performance nanoscale architecture of SoCs. IrNIRGAM is a discrete event, cycle accurate simulator targeted at irregular topology based Network on Chip (NoC) research. The generic, modular, and extensible framework of IrNIRGAM provides substantial support to experiment with direct network based NoC designs in terms of routing algorithms, applications on various topologies and related performance parameters such as throughput, communication latency etc. IrNIRGAM is written in SystemC and C++. Topology represents the most important characteristic of NoC architectures and essentially defines the physical interconnection of the router nodes. In IrNIRGAM, input buffered routers can have multiple virtual channels (VCs) and uses wormhole switching for flow control. The packets are split into an arbitrary number of flits (flow control units) and forwarded through the network in a pipelined fashion. A Round-Robin scheme for switch arbitration is used in the router nodes to provide fair bandwidth allocation while effectively preventing scheduling anomalies like starvation.

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Index Terms

Computer Science
Information Sciences

Keywords

Network-on-Chip Simulation System-on-Chip IP Core Interconnection Networks