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HDLC Implementation in Wireless Sensor Networks

by Deepika Sharma, Rajeev Kumar Patial
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 102 - Number 2
Year of Publication: 2014
Authors: Deepika Sharma, Rajeev Kumar Patial
10.5120/17786-8568

Deepika Sharma, Rajeev Kumar Patial . HDLC Implementation in Wireless Sensor Networks. International Journal of Computer Applications. 102, 2 ( September 2014), 11-15. DOI=10.5120/17786-8568

@article{ 10.5120/17786-8568,
author = { Deepika Sharma, Rajeev Kumar Patial },
title = { HDLC Implementation in Wireless Sensor Networks },
journal = { International Journal of Computer Applications },
issue_date = { September 2014 },
volume = { 102 },
number = { 2 },
month = { September },
year = { 2014 },
issn = { 0975-8887 },
pages = { 11-15 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume102/number2/17786-8568/ },
doi = { 10.5120/17786-8568 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T22:32:04.724581+05:30
%A Deepika Sharma
%A Rajeev Kumar Patial
%T HDLC Implementation in Wireless Sensor Networks
%J International Journal of Computer Applications
%@ 0975-8887
%V 102
%N 2
%P 11-15
%D 2014
%I Foundation of Computer Science (FCS), NY, USA
Abstract

The work aims the designing and implementing an efficient HDLC chip. We use pipelining technique in HDLC register module which increases the throughput of the system and also helps in decreasing the delay of the system. In pipeline technique, number of instructions has been executed at the same time. The HDLC chip designed here supports two way communications means it supports full duplex communications which means that it can transmit and receive continuously. In this paper we adopt Xilinx's Spartan-3E for HDLC implementation and for hardware simulation we use Modelsim SE 6. 2C.

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Index Terms

Computer Science
Information Sciences

Keywords

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