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Simulation Development of Carrier based Pulse Width Modulation for Cascaded Multilevel Inverter

by Bambang Sujanarko
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 104 - Number 5
Year of Publication: 2014
Authors: Bambang Sujanarko
10.5120/18202-9124

Bambang Sujanarko . Simulation Development of Carrier based Pulse Width Modulation for Cascaded Multilevel Inverter. International Journal of Computer Applications. 104, 5 ( October 2014), 36-41. DOI=10.5120/18202-9124

@article{ 10.5120/18202-9124,
author = { Bambang Sujanarko },
title = { Simulation Development of Carrier based Pulse Width Modulation for Cascaded Multilevel Inverter },
journal = { International Journal of Computer Applications },
issue_date = { October 2014 },
volume = { 104 },
number = { 5 },
month = { October },
year = { 2014 },
issn = { 0975-8887 },
pages = { 36-41 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume104/number5/18202-9124/ },
doi = { 10.5120/18202-9124 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T22:35:25.145112+05:30
%A Bambang Sujanarko
%T Simulation Development of Carrier based Pulse Width Modulation for Cascaded Multilevel Inverter
%J International Journal of Computer Applications
%@ 0975-8887
%V 104
%N 5
%P 36-41
%D 2014
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Cascaded multilevel inverter (CMLI) is emerging as a new breed of power converter options for high-power applications. Various topologies and modulation strategies of this inverter has been proposed. In this paper, Matlab simulink of CMLI using Carrier Based Pulse Width Modulation (CBPWM) techniques is developed to get optimum design and performances. Some parameter of this Simulink model can be varied, so some interesting characteristics of the inverter can be optimized. A simulation result shows that the system is easy and modular to adjust, and optimum performances can improve.

References
  1. Lipo et. all, Hybrid Topology for Multilevel Converter Power Conversion, US Patent, 6,005,788, December, 21, 1999.
  2. Jinbang Xu, Zhizhuo Wu, Xiao Wu, Fang Wu, Anwen Shen, "An Improved Phase Disposition SPWM Strategy for Cascaded Multilevel Inverter,Mathematical Problems in Engineering", Vol. 2014 (2014), 1-9.
  3. Vassilios Agelidis G. , Anastasios Balouktsis I. , and Mohamed Dahidah S. A. , "A Five-Level Symmetrically Defined Selective Harmonic Elimination PWM Strategy: Analysis and Experimental Validation", IEEE Transactions on Power Electronics, Vol. 23, No. 1, January 2008.
  4. Tahri A. , Draou A. , "A Comparative Modelling Study of PWM Control Techniques for Multilevel Cascaded Inverter", Leonardo Journal of Sciences, Issue 6, January-June 2005, 42-58.
  5. Bambang Sujanarko, Mochamad Ashari, Mauridhi Hery Purnomo, Ontoseno Penangsang, Soebagjo, "Advanced Carrier Based Pulse Width Modulation in Asymmetric Cascaded Multilevel Inverter", International Journal of Electrical & Computer Sciences IJECS-IJENS Vol. 10 No. 06, 2010, 42-46.
  6. Bambang Sujanarko, Mochamad Ashari, Mauridhi Hery Purnomo, "Comparison Performances of Asymmetric Multilevel Inverters in the Maximum Voltage Rating of Power Electronic Devices", International Review on Modeling and Simulations (I. RE. MO. S. ), Vol. 4, no. 2, April 2011.
  7. M. H. Rashid, 2001, Power Electronics Handbook, Academic Press, Canada
  8. Mohamed S. A. , Dahidah and Vassilios G Agelidis, "Selective Harmonic Elimination PWM Control for Cascaded Multilevel Voltage Source Converters: A Generalized Formula", IEEE Transactions on Power Electronics, Vol. 23, No. 4, July 2008, 1620-1630.
  9. M. Kiran Kumar, M. Saikiran, Ch. Venkateswarlu, "Cascaded Multilevel Inverter with PWM Control Method",International Journal of Engineering Trends and Technology, (IJETT),Vol. 4, Issue 5, May 2013, 1491-1496
  10. Advantech, "PCI-1711/L Entry-level 100 kS/s, 12-bit, 16-ch PCI Multifunction Card", Advantech.
Index Terms

Computer Science
Information Sciences

Keywords

cascaded multilevel inverter carrier based pulse width modulation frequency total harmonic distortion

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