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Energy Efficiency Enhancement for 45nm 1Mb SRAM Array Structures
| International Journal of Computer Applications |
| Foundation of Computer Science (FCS), NY, USA |
| Volume 105 - Number 5 |
| Year of Publication: 2014 |
| Authors: Mamatha Samson, Madhulatha |
10.5120/18373-9531
|
Mamatha Samson, Madhulatha . Energy Efficiency Enhancement for 45nm 1Mb SRAM Array Structures. International Journal of Computer Applications. 105, 5 ( November 2014), 16-20. DOI=10.5120/18373-9531
Abstract
Energy efficiency is a supreme design concern in many ultralow-power applications. In such applications, high density Static Random-Access Memory (SRAM) plays a significant role. This paper explores and analyzes 1Mb SRAM array structures for energy efficiency improvement by adopting circuit modifications and inclusion of charge sharing circuits. The analysis shows that the array structure optimization and charge accumulator circuits can improve the energy efficiency for the same SRAM bit density and the same supply voltage.
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