CFP last date
20 May 2024
Reseach Article

Effective use of Multi-Core Architecture through Multi-Threading towards Computation Intensive Signal Processing Applications

by Prathmesh Deshmukh, Akhil Kurup, Shailesh.v.kulkarni
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 110 - Number 1
Year of Publication: 2015
Authors: Prathmesh Deshmukh, Akhil Kurup, Shailesh.v.kulkarni
10.5120/19278-0687

Prathmesh Deshmukh, Akhil Kurup, Shailesh.v.kulkarni . Effective use of Multi-Core Architecture through Multi-Threading towards Computation Intensive Signal Processing Applications. International Journal of Computer Applications. 110, 1 ( January 2015), 6-9. DOI=10.5120/19278-0687

@article{ 10.5120/19278-0687,
author = { Prathmesh Deshmukh, Akhil Kurup, Shailesh.v.kulkarni },
title = { Effective use of Multi-Core Architecture through Multi-Threading towards Computation Intensive Signal Processing Applications },
journal = { International Journal of Computer Applications },
issue_date = { January 2015 },
volume = { 110 },
number = { 1 },
month = { January },
year = { 2015 },
issn = { 0975-8887 },
pages = { 6-9 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume110/number1/19278-0687/ },
doi = { 10.5120/19278-0687 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T22:45:13.394937+05:30
%A Prathmesh Deshmukh
%A Akhil Kurup
%A Shailesh.v.kulkarni
%T Effective use of Multi-Core Architecture through Multi-Threading towards Computation Intensive Signal Processing Applications
%J International Journal of Computer Applications
%@ 0975-8887
%V 110
%N 1
%P 6-9
%D 2015
%I Foundation of Computer Science (FCS), NY, USA
Abstract

With the advent of Multicore architecture availability, exploiting parallelism is posing certain trends and tides for application deployment. Earlier approaches to explore parallelism in applications were limited to either instruction level parallelism (ILP) or use of architectural redundant resources. In this paper, we attempted to use multicore processor to demonstrate the speedup in compute intensive tasks such as Convolution, primitive to most Digital Signal Processing algorithms. Further result of multithreaded application on Multicore processor compared with single core is demonstrated for lower and upper limit of granularity for application fragmentation. This work suggests the need for design of memory manager for Multithreading to exploit it more effectively.

References
  1. L. Peng et al, "Memory Performance and Scalability of Intel's and AMD's Dual-Core Processors: A Case Study", IEEE, 2007.
  2. T. Holwerda, "Intel: Software Needs to Heed Moore's Law",http://www. osnews. com/story/17983/Intel-Software-Needs-to-Heed-Moores-Law/
  3. Student Guide, "Multi-Core Programming For Windows", Intel Corp 2006.
  4. Student Handout, "POSIX* Threading API Quick Reference", Intel Corp 2006
  5. Ananth Grama, George Karypis, Vipin Gupta, Anshul Kumar, "Introduction to Parallel Computing, 2nd edition", Pearson publication
  6. Georgios Kornaros, "Multi-Core Embedded Systems", CRC Press
  7. Simon Haykin, Barry Van Veen, "Signals and Systems, 2nd edition", John Wiley and Sons.
  8. Massimiliano Meneghin, et. al,"Performance evaluation of inter-thread communication mechanisms on multicore/ multithreaded architectures", IBM technical paper
  9. Jun Yan, Wei Zhang, "Hybrid Multi-Core Architecture for Boosting Single-Threaded Performance", ACM SIGARCH Computer Architecture News, , Vol. 35, No. 1, March 2007, pp 141-148.
Index Terms

Computer Science
Information Sciences

Keywords

Multithreading multicore granularity