Call for Paper - July 2019 Edition
IJCA solicits original research papers for the July 2019 Edition. Last date of manuscript submission is June 20, 2019. Read More

Fast Edge Detection Architecture using Different Levels of Parallelism on a FPGA

Print
PDF
International Journal of Computer Applications
© 2015 by IJCA Journal
Volume 113 - Number 13
Year of Publication: 2015
Authors:
Mohammad Shokrolah Shirazi
Brendan Tran Morris
10.5120/19883-1914

Mohammad Shokrolah Shirazi and Brendan Tran Morris. Article: Fast Edge Detection Architecture using Different Levels of Parallelism on a FPGA. International Journal of Computer Applications 113(13):1-8, March 2015. Full text available. BibTeX

@article{key:article,
	author = {Mohammad Shokrolah Shirazi and Brendan Tran Morris},
	title = {Article: Fast Edge Detection Architecture using Different Levels of Parallelism on a FPGA},
	journal = {International Journal of Computer Applications},
	year = {2015},
	volume = {113},
	number = {13},
	pages = {1-8},
	month = {March},
	note = {Full text available}
}

Abstract

Implementing edge detection techniques on a FPGA has recently become more popular since it benefits high speed which is desired for real-time applications. This work presents a fast FPGAbased architecture for first order derivative edge detection methods. Fast pipeline-based architectures are presented which are able to perform edge detection using different levels of parallelism to accelerate the process. This acceleration includes applying parallelism over convolution masks, edge detection modules and image intensity values. Two different edge detection architectures are proposed called one-way and two-way parallel methods. The architectures are implemented using Verilog HDL for a typical image and we synthesized them for Cyclone IV FPGA. Experimental results show the speed-up near to 460 and 920 for one-way and two-way parallel architectures.

References

  • G. Anusha, T. J. Prasad, and D. Narayana. Implementation of sobel edge detection on fpga. Proceeding of the International Journal of Computer Trends and Technology, 3(3):471–475, 2012.
  • D. G. Bariamis, D. K. Iakovidis, D. E. Maroulis, and S. A. Karkanis. An fpga-based architecture for real time image feature extraction. In Proceedings of the 17th International Conference on Pattern Recognition, pages 801–814, Cambridge, UK, 2004.
  • M. P. S. Chikkali and K. Prabhushetty. Fpga based image edge detection and segmentation. Proceeding of the International Journal of Advanced Engineering Sciences and Technologies, 9(2):187–192, 2011.
  • B. A. Draper, J. R. Beveridge, A. P. W. Bhm, C. Ross, and M. Chawathe. Accelerated image processing on fpgas. IEEE Transactions on Image Processing, 12(12):1543–1551, 2003.
  • J. L. Hannesy and D. A. Patterson. Computer Architecture, A Quantitative Approach. Morgan Kaufmann, 5 edition, 2011.
  • R. Harinarayan, R. Pannerselvam, M. M. Ali, and D. K. Tripathi. Feature extraction of digital aerial images by fpga based implementation of edge detection algorithms. In Proceeding of the International Conference on Emerging Trends in Electrical and Computer Technology, pages 631–635, Tamil Nadu, India, 2011.
  • W. Jincheng, Sun Jingrui, and Liu Wenying. Design and implementation of video image edge detection system based on fpga. In Proceedings of the 3rd International Congress on Image and Signal Processing, pages 472–476, Yantai, China, 2010.
  • C. T. Johnston, K. T. Gribbon, and D. G. Bailey. Implementing image processing algorithms on fpgas. In Proceeding of the Eleventh Electronics New Zealand Conference, pages 118–123, Palmerston North, New Zealand, 2004.
  • D. Llamocca, C. Carranza, and M. Pattichis. Separable fir filtering in fpga and gpu implementations: Energy, performance, and accuracy considerations. In Proceedings of the International Conference on Field Programmable Logic and Applications, pages 363–368, Chania, 2011.
  • R. Maini and J. S. Sohal. Performance evaluation of prewit edge detector for noisy images. Proceeding of the International Journal on Graphics, Vision and Image Processing, 6(3):90–95, 2006. December.
  • S. K. C. J. Majumdar. A novel architecture for real time implementation of edge detectors on fpga. Proceeding of the International Journal of Computer Science Issues, 8(1):193–202, 2011.
  • R. Mehra and S. Verma. Area efficient fpga implementation of sobel edge detector for image processing application. Proceeding of the International Journal of Computer Applications, 56(16), 2012.
  • D. A. Patterson and J. L. Hannesy. Computer Organization and Design, The Hardware/Software Interface. Morgan Kaufmann, 5 edition, September 2013.
  • J. M. Ramirez, E. M. Flores, j. Martinez-Carballido, R. Enriquez, V. Alarcon-Aquino, and D. Baez-Lopez. An fpgabased architecture for linear and morphological image filtering. In Proceeding of the 20th International Conference on Electronics, Communications and Computer, pages 90–95, Cholula, Mexico, 2010.
  • V. Sanduja and R. Patial. Sobel edge detection using parallel architecture based on fpga. Proceeding of the International Journal of Applied Information Systems, 3(14), 2012.
  • H. Santanu, D. Bhattacharjee, M. Nasipuri, and D. K. Basu. A fast fpga based architecture for sobel edge detection. In Proceeding of the 16th International Conference on Progress in VLSI Design and Test, pages 300–306, Shibpur, India, 2012. Springer Berlin Heidelberg.
  • R. Szeliski. Computer Vision: Algorithms and Applications. Morgan Kaufmann, 2010.
  • I. Yasri, N. H. Hamid, and V. V. Yap. Performance analysis of fpga based sobel edge detection operator. In Proceeding of the International Conference on Electronic Design, pages 1–4, Penang, Malaysia, 2008.