The architectural advancements in desktop computing have made embedded devices in real time applications to adopt multi core architectures. Constrained power availability but ever increasing performance requirements are the main reason for this migration. Failure to allocate tasks to specific cores would result in some tasks running while other tasks in other cores remaining idle. The efficiency of the entire system would decrease and the tasks with higher priority could cause bottlenecks. In this work, we propose a model which could analyze, split and allocate the tasks to cores. The results of the proposed model for a real time automobile application were observed to be effective on multi core architecture.

Cores Symbolic Model Verifier Scheduler.