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Different Techniques used for Carry Select Adder - A Review

by Rajwinder Kaur, Amit Grover
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 116 - Number 3
Year of Publication: 2015
Authors: Rajwinder Kaur, Amit Grover

Rajwinder Kaur, Amit Grover . Different Techniques used for Carry Select Adder - A Review. International Journal of Computer Applications. 116, 3 ( April 2015), 1-4. DOI=10.5120/20313-2365

@article{ 10.5120/20313-2365,
author = { Rajwinder Kaur, Amit Grover },
title = { Different Techniques used for Carry Select Adder - A Review },
journal = { International Journal of Computer Applications },
issue_date = { April 2015 },
volume = { 116 },
number = { 3 },
month = { April },
year = { 2015 },
issn = { 0975-8887 },
pages = { 1-4 },
numpages = {9},
url = { },
doi = { 10.5120/20313-2365 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
%0 Journal Article
%1 2024-02-06T22:56:01.653081+05:30
%A Rajwinder Kaur
%A Amit Grover
%T Different Techniques used for Carry Select Adder - A Review
%J International Journal of Computer Applications
%@ 0975-8887
%V 116
%N 3
%P 1-4
%D 2015
%I Foundation of Computer Science (FCS), NY, USA

To design the power and area proficient fast speed data path logic systems, the field of very large scale integration (VLSI) is the generally significant area of research where minimize the area and power is the more difficult task. In digital system, mostly adders lie in the crucial paths that affect the whole performance of the system. To perform the fast arithmetic functions in many data processing processors at low cost, carry select adder is the most suitable adder among the various adders. In this paper, we describe the different techniques which are used to design the proficient CSLA.

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Index Terms

Computer Science
Information Sciences


Carry Select Adder (CSLA) Arithmetic logic unit (ALU) RCA BEC CBL D-Latch Basic unit.