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big. LITTLE Architecture: Heterogeneous Multicore Processing

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International Journal of Computer Applications
© 2015 by IJCA Journal
Volume 119 - Number 1
Year of Publication: 2015
Authors:
Shubham Kamdar
Neha Kamdar
10.5120/21034-3106

Shubham Kamdar and Neha Kamdar. Article: big.LITTLE Architecture: Heterogeneous Multicore Processing. International Journal of Computer Applications 119(1):35-38, June 2015. Full text available. BibTeX

@article{key:article,
	author = {Shubham Kamdar and Neha Kamdar},
	title = {Article: big.LITTLE Architecture: Heterogeneous Multicore Processing},
	journal = {International Journal of Computer Applications},
	year = {2015},
	volume = {119},
	number = {1},
	pages = {35-38},
	month = {June},
	note = {Full text available}
}

Abstract

ARM's big. LITTLE architecture introduces a solution to optimize power consumption by selecting the core type most suitable for a level of processing load along with high performance. Using heterogeneous multi-core processing having high performance cortex-A15 with power efficient cortex-A7 is what big. LITTLE architecture follows to have power efficient system on chip which is demanded by today's smart phones. For smooth functioning and effective data transferring big. LITTLE uses GIC-400 and CCI-400 interfaces to interface between two processors. Present smart phones using big. LITTLE technology having cluster migration as their operating mode. But using global task scheduling method as operating mode of smart phones in which cores gets individually activated or deactivated according to workload can give even further improvement in power consumption.

References

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