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Study of DC Characteristics in Reliable 4-T Relay Technology for Ultrafast Low Energy NEM Digital IC’s

by Soumitra S. Pande, R.P. Gupta
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 139 - Number 9
Year of Publication: 2016
Authors: Soumitra S. Pande, R.P. Gupta

Soumitra S. Pande, R.P. Gupta . Study of DC Characteristics in Reliable 4-T Relay Technology for Ultrafast Low Energy NEM Digital IC’s. International Journal of Computer Applications. 139, 9 ( April 2016), 40-44. DOI=10.5120/ijca2016908383

@article{ 10.5120/ijca2016908383,
author = { Soumitra S. Pande, R.P. Gupta },
title = { Study of DC Characteristics in Reliable 4-T Relay Technology for Ultrafast Low Energy NEM Digital IC’s },
journal = { International Journal of Computer Applications },
issue_date = { April 2016 },
volume = { 139 },
number = { 9 },
month = { April },
year = { 2016 },
issn = { 0975-8887 },
pages = { 40-44 },
numpages = {9},
url = { },
doi = { 10.5120/ijca2016908383 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
%0 Journal Article
%1 2024-02-06T23:40:32.018353+05:30
%A Soumitra S. Pande
%A R.P. Gupta
%T Study of DC Characteristics in Reliable 4-T Relay Technology for Ultrafast Low Energy NEM Digital IC’s
%J International Journal of Computer Applications
%@ 0975-8887
%V 139
%N 9
%P 40-44
%D 2016
%I Foundation of Computer Science (FCS), NY, USA

Nano-electro-mechanical(NEM) relay technology has been proposed efficiently for ultra-low- power digital integrated circuit applications [1], [2]. This is because the relay is an ideal switch, and that it exhibits abrupt on/off switching behavior and zero off- state leakage current (IOFF), so that its operating voltage (VDD) can be reduced to be close to zero, in principle. Hence, NEM relay technology can robustly overcome the fundamental energy efficiency limit of CMOS technology [3]. In order to realize this promise, however, relays must have high reliability and low switching voltages. The former requirement has been difficult to achieve because of surface wear and stiction-induced failure. The latter requirement is difficult to achieve with a conventional 3-Terminal (3T) relay design, particularly for highly scaled dimensions [1]. In order to chieve low voltage operation, low pull-in voltage is desired. This is difficult to achieve through layout and process. Longer beams (smaller spring constant) or larger actuation area (higher electrostatic force) can be employed at the expense of larger area. Reducing the air gap thickness potentially increase susceptibility to stiction during release. A thinner structural material with lower spring constant is often hampered by strain gradient problems. Furthermore, there will always be some variability in pull-in voltage due to process- induced variations. In this paper, a highly reliable mechanical contact technology employing tungsten electrodes is developed and a 4-Terminal (4T) relay technology is proposed to overcome these challenge for complementary logic circuit applications. The 4T relay design provides a convenient way of electrically adjusting the gate switching voltages post-process via body biasing for low-voltage operation. As a result, a 4T relay can mimic the operation of either an n-channel or p-channel MOSFET. Prototype relays fabricated with a CMOS-compatible process are demonstrated. Fabricated 4T relays exhibit good on-state current (ION> 700.2μA for V DS= 1.1V) and zero off-stateleakage current with subthreshold swing <0.1 mV/dec. Low-voltage switching (<2 V) and low switching delay(100 ns) are demonstrated by appropriately biasing the body terminal. Endurance exceeds 109on/off cycles without stiction or wear issues. Therefore, the 4T relay technology is promising to realize relay-based integrated circuits.

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Index Terms

Computer Science
Information Sciences


CMOS Electrostatic Force Electrodes Gradient Relay Stiction Strain Susceptibility.