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Hand-drawn Digital Logic Circuit Component Recognition using SVM

International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Year of Publication: 2016
Mayuri D. Patare, Madhuri S. Joshi

Mayuri D Patare and Madhuri S Joshi. Hand-drawn Digital Logic Circuit Component Recognition using SVM. International Journal of Computer Applications 143(3):24-28, June 2016. BibTeX

	author = {Mayuri D. Patare and Madhuri S. Joshi},
	title = {Hand-drawn Digital Logic Circuit Component Recognition using SVM},
	journal = {International Journal of Computer Applications},
	issue_date = {June 2016},
	volume = {143},
	number = {3},
	month = {Jun},
	year = {2016},
	issn = {0975-8887},
	pages = {24-28},
	numpages = {5},
	url = {},
	doi = {10.5120/ijca2016910058},
	publisher = {Foundation of Computer Science (FCS), NY, USA},
	address = {New York, USA}


Hand-drawn circuit diagrams are widely used in engineering fields, especially for the early design phases because sketch is a convenient tool to understand rough ideas of system development. Using such hand-drawn diagrams designers can focus more on the critical issues rather than on the intricate details. Electronic system design is one of the application areas in this context. To speed up the development process of such systems, hand-drawn circuits design need be transformed into the computers. The problem is that although it seems very easy for humans to recognize sketches, it is really a great challenge for the computers. This paper proposed a method to recognize components in hand drawn digital logic circuit diagram. This system used region based segmentation method to segment circuit sketch, and classified each component using Support Vector Machine that uses Fourier descriptor as the feature vector. An average of 83% circuit recognition accuracy is achieved.


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Circuit Sketch Recognition, Support Vector Machine (SVM), Fourier descriptor.