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Reseach Article

An Efficient Hybrid Parallel Prefix Adders for Reverse Converters using QCA Technology

by N. Chandini, B. Chinna Rao, A. Jaya Laxmi
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 153 - Number 1
Year of Publication: 2016
Authors: N. Chandini, B. Chinna Rao, A. Jaya Laxmi
10.5120/ijca2016911528

N. Chandini, B. Chinna Rao, A. Jaya Laxmi . An Efficient Hybrid Parallel Prefix Adders for Reverse Converters using QCA Technology. International Journal of Computer Applications. 153, 1 ( Nov 2016), 7-12. DOI=10.5120/ijca2016911528

@article{ 10.5120/ijca2016911528,
author = { N. Chandini, B. Chinna Rao, A. Jaya Laxmi },
title = { An Efficient Hybrid Parallel Prefix Adders for Reverse Converters using QCA Technology },
journal = { International Journal of Computer Applications },
issue_date = { Nov 2016 },
volume = { 153 },
number = { 1 },
month = { Nov },
year = { 2016 },
issn = { 0975-8887 },
pages = { 7-12 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume153/number1/26365-2016911528/ },
doi = { 10.5120/ijca2016911528 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T23:57:56.633051+05:30
%A N. Chandini
%A B. Chinna Rao
%A A. Jaya Laxmi
%T An Efficient Hybrid Parallel Prefix Adders for Reverse Converters using QCA Technology
%J International Journal of Computer Applications
%@ 0975-8887
%V 153
%N 1
%P 7-12
%D 2016
%I Foundation of Computer Science (FCS), NY, USA
Abstract

In many building blocks of microprocessors and digital signal processing chips, adders are frequently available in their critical paths. Adders can also be used for subtraction, multiplication and division. One of the important basic arithmetic operations is addition. There are several structures like Ripple Carry Adder (RCA), Carry Look Ahead Adder (CLA) to perform the addition. Parallel prefix adders speed up the addition operation when compared to the other structures. Generally these adders provide less power consumption, but these consume more power when these are used in reverse converters. To reduce this high power consumption, hybrid parallel prefix adders can be used. In this paper, two structures namely, Hybrid Regular Parallel Prefix XOR/OR (HRPX) Adder and Hybrid Modular Parallel Prefix Excess-one (HMPE) Adder are discussed which uses modulo addition. Further these two adders are implemented using the Quantum dot cellular automata (QCA) technology, which reduces the delay. This entire work is done in Xilinx 13.2 tool ISE simulator.

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Index Terms

Computer Science
Information Sciences

Keywords

Addition Parallel prefix adders Black cell Gray cell Quantum dot cellular automata Power Delay.