CFP last date
20 May 2024
Call for Paper
June Edition
IJCA solicits high quality original research papers for the upcoming June edition of the journal. The last date of research paper submission is 20 May 2024

Submit your paper
Know more
The week's pick
Responsive image
Enhancing Privacy Preservation: Multi-Attribute Protection with P-Sensitive K-Anonymity

Twinkle Patel Kiran Amin
Random Articles
Reseach Article

Efficient Implementation of a Scalable Encryption Algorithm using FPGA

by Dr. S. Sankara Gomathi, P. Ezhumalai, B. Praveen Kumar
journal cover thumbnail

International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 3 - Number 10
Year of Publication: 2010
Authors: Dr. S. Sankara Gomathi, P. Ezhumalai, B. Praveen Kumar
10.5120/774-1087

Dr. S. Sankara Gomathi, P. Ezhumalai, B. Praveen Kumar . Efficient Implementation of a Scalable Encryption Algorithm using FPGA. International Journal of Computer Applications. 3, 10 ( July 2010), 27-31. DOI=10.5120/774-1087

@article{ 10.5120/774-1087,
author = { Dr. S. Sankara Gomathi, P. Ezhumalai, B. Praveen Kumar },
title = { Efficient Implementation of a Scalable Encryption Algorithm using FPGA },
journal = { International Journal of Computer Applications },
issue_date = { July 2010 },
volume = { 3 },
number = { 10 },
month = { July },
year = { 2010 },
issn = { 0975-8887 },
pages = { 27-31 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume3/number10/774-1087/ },
doi = { 10.5120/774-1087 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T19:51:34.109162+05:30
%A Dr. S. Sankara Gomathi
%A P. Ezhumalai
%A B. Praveen Kumar
%T Efficient Implementation of a Scalable Encryption Algorithm using FPGA
%J International Journal of Computer Applications
%@ 0975-8887
%V 3
%N 10
%P 27-31
%D 2010
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Initially SEA is designed for software implementations in controllers, smart cards, or processors. In this Paper we proposed a system that investigates its performances in recent field-programmable gate array (FPGA) devices. The present symmetric encryption algorithms result from a tradeoff between implementation cost and resulting performances. The proposed system is applicable where there are limited processing resources with high throughput requirements.

References
Index Terms

Computer Science
Information Sciences

Keywords

FPGA – Field Programmable Gate Array Computer security DES - Data Encryption Standard VHDL – Hardware Description Language

Powered by PhDFocusTM