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10.5120/4080-5876 |
Riadh Hocine and Hamoudi Kalla. Article: Encoding SystemC Models in Formal Synchronous Formalism. International Journal of Computer Applications 34(3):26-32, November 2011. Full text available. BibTeX
@article{key:article, author = {Riadh Hocine and Hamoudi Kalla}, title = {Article: Encoding SystemC Models in Formal Synchronous Formalism}, journal = {International Journal of Computer Applications}, year = {2011}, volume = {34}, number = {3}, pages = {26-32}, month = {November}, note = {Full text available} }
The size and thus the complexity of many systems, that use an intellectual property component (IP), have reached a level where design validation with mere testing and simulation does not deliver the required quality any more. Obtaining a formal model from a non-formal one is a complex and error prone task. A logical step is therefore to try to generate automatically a formal description from an existing non-formal system model, thus making this step faster and more reliable. In this paper, we describe a methodology to automaticallygenerate formal synchronous models from existing non-formalsystem level design descriptions that integrates smoothly intoexisting co-design flows. We exemplify the approach with thepopular system design language SystemC and the flexible andexpressive synchronous dataflow formalism SIGNAL.SystemC is a HDL which allows for modeling systems in behavioral level, it is a set of library routines and macros implemented in C++, it is a good language for input of design flow for the systems which requires verification, but it is not a formal language.