The week's pick
Random Articles
Reseach Article
Efficient String Matching Using Deterministic Finite Automation Hardware: Speed vs Area Tradeoff
| International Journal of Computer Applications |
| Foundation of Computer Science (FCS), NY, USA |
| Volume 44 - Number 18 |
| Year of Publication: 2012 |
| Authors: Aakanksha Pandey, Nilay Khare |
10.5120/6366-8750
|
Aakanksha Pandey, Nilay Khare . Efficient String Matching Using Deterministic Finite Automation Hardware: Speed vs Area Tradeoff. International Journal of Computer Applications. 44, 18 ( April 2012), 37-42. DOI=10.5120/6366-8750
Abstract
Pattern matching is a crucial task in several critical network services such as intrusion detection and matching of the IP address during packet forwarding by the router. In this paper we present an speed vs area tradeoff of the the original DFA and the DFA called delayed input DFA(D2FA) with optimized area by eliminating the redundant transition edges. In delayed input DFA the area required to store transition table reduces to 60% of the original DFA but the clock pulse required to execute the process increases almost 40% of the original DFA. The comparison of area and speed is presented. This area optimized architecture of DFA is simulated and synthesized using VHDL on the Xilinx ISE 12. 4.
References
- A. BabuKaruppiah, Dr. S Rajaram "Deterministic Finite Automata for Pattern Matching in FPGA for intrusion Detection" in International Conference on Computer and Electrical Technoogy-ICCCET 2011,18th& 19th March,2011. "
- Jan Kastil, Jan Korenek Hardware Accelerated Pattern Matching Based onDeterministic Finite Automata with Perfect Hashing,IEEE 2010,p-149-152.
- Kai Wang, Yaxuan Q, YiboXue, Jun LReorganized and Compact DFA for EfficientRegular Expression Matching,IEEE communication society
- Hiroki Nakahara,TsutomuSasao and Munehiromatsuura "A Regular Expression Matching Using Non-Deterministic Finite Automata" in IEEE 2010.
- IvanoBonesana,MarcoPaolieri,Marco D. Santambrogio "An adaptable FPGA based system for regular expression Matching" in IEEE 2008.
- Mother Aldwairi,ThomasConte,PaulFranzon "Configurable string Matching Hardware for Speeding up Intrusion detection" inACM SIGARCH Computer Architecture News in,Vol. 33,No. 1, March 2005.
- Ashok kumarTummala and ParimalPatel"Distributed IDS using Reconfigurable Hardware" in IEEE 2007.
- Hoang Le and Viktor K. Prasanna Ming Hsieh Department of Electrical Engineering University of Southern California Los Angeles, CA 90089, USA A Memory-Efficient and Modular Approach for String Matching on FPGAs ,2010
- M. Dhanapriya,C. Vasanthanayaki "Hardware Based Pattern Matching Technique for Packet Inspection of High Speed Network" International Conference on "Control,Automation,Communication and energy Consevation-2009 4th -6thjune 2009.
- IoannisSourdis, DionisiosN. Pnevmatikatos, and StamatisVassiladis," Scalable Multigigabit Pattern Matching for Packet Inspection," in Proc. IEEE Symp. Field program. Custom Comput. Feb. 2008.
- B. L. Hutchings and R. Franklin and D. Carver "Scalable hardware implementation usonf Finite Automata"Department of Electrical and Computer Engineering.
- J. Hasan, S. Cadambi, V. Jakkula and S. Chakradhar, "Chisel: A Storage-efficient, Collision-free Hash-based Network Processing Architecture," 33rd International Symposium on Computer Architecture,p. 203-215.
- ReetinderSidhu,Vikot K. Prasanna "Fast Regular Expression Matching using FPGAs"9th Annual Symposium IEEE2001.
- Sailesh Kumar, SarangDharmapurikar, Fang Yu, Patrick Crowley, Jonathan Turner "Algorithms to Accelerate Multiple Regular Expressions Matching for Deep Packet Inspection", SIGCOMM'06, September 11-15, 2006, Pisa, Italy, 2006 ACM.
Index Terms
Keywords