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Hybrid Architecture for OFDM with Optimized Design of Analog Viterbi Decoder

by Sujatha Cyril, Dharmistan K. Varugheese
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 55 - Number 2
Year of Publication: 2012
Authors: Sujatha Cyril, Dharmistan K. Varugheese
10.5120/8729-2607

Sujatha Cyril, Dharmistan K. Varugheese . Hybrid Architecture for OFDM with Optimized Design of Analog Viterbi Decoder. International Journal of Computer Applications. 55, 2 ( October 2012), 33-40. DOI=10.5120/8729-2607

@article{ 10.5120/8729-2607,
author = { Sujatha Cyril, Dharmistan K. Varugheese },
title = { Hybrid Architecture for OFDM with Optimized Design of Analog Viterbi Decoder },
journal = { International Journal of Computer Applications },
issue_date = { October 2012 },
volume = { 55 },
number = { 2 },
month = { October },
year = { 2012 },
issn = { 0975-8887 },
pages = { 33-40 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume55/number2/8729-2607/ },
doi = { 10.5120/8729-2607 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T20:56:14.885818+05:30
%A Sujatha Cyril
%A Dharmistan K. Varugheese
%T Hybrid Architecture for OFDM with Optimized Design of Analog Viterbi Decoder
%J International Journal of Computer Applications
%@ 0975-8887
%V 55
%N 2
%P 33-40
%D 2012
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Analog Viterbi Decoder (AVD) is used for decoding of message from the received signal. Very recently mixed signal architecture for OFDM was proposed, that uses FFT processing in the analog domain. In this work, we propose a modified analog Viterbi decoder that performs decoding in analog domain. The proposed analog Viterbi decoder can be used in the mixed signal architecture of OFDM model and hence the proposed architecture is called as Hybrid OFDM architecture. Software reference model of the proposed AVD is developed using Simulink and is verified for its functionality. The Branch Metric Unit (BMU) and the adder unit that forms the subsystems of AVD are optimized for area, power and speed by designing the adders with 24 transistors. The schematic and layout is designed using Virtuoso targeting 130nm technology, the captured design is verified for its functionality using known test vector. A digital Viterbi decoder is also designed with same specifications as that of AVD, and is synthesized using Design Compiler for comparison. From the results obtained it is found that the AVD is 100 time faster, occupies 8 time less are and consumes power less than 86 micro W compared with digital decoder. The proposed AVD is suitable for low power and high speed applications and can be used in Hybrid OFDM architecture.

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Index Terms

Computer Science
Information Sciences

Keywords

Hybrid OFDM analog Viterbi decoder layout design software model analog OFDM

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