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Implementation of High Speed Fixed Point CORDIC Techniques

by Sukhpreet Kaur, Kulbir Singh
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 56 - Number 3
Year of Publication: 2012
Authors: Sukhpreet Kaur, Kulbir Singh
10.5120/8874-2854

Sukhpreet Kaur, Kulbir Singh . Implementation of High Speed Fixed Point CORDIC Techniques. International Journal of Computer Applications. 56, 3 ( October 2012), 35-41. DOI=10.5120/8874-2854

@article{ 10.5120/8874-2854,
author = { Sukhpreet Kaur, Kulbir Singh },
title = { Implementation of High Speed Fixed Point CORDIC Techniques },
journal = { International Journal of Computer Applications },
issue_date = { October 2012 },
volume = { 56 },
number = { 3 },
month = { October },
year = { 2012 },
issn = { 0975-8887 },
pages = { 35-41 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume56/number3/8874-2854/ },
doi = { 10.5120/8874-2854 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T20:57:56.670841+05:30
%A Sukhpreet Kaur
%A Kulbir Singh
%T Implementation of High Speed Fixed Point CORDIC Techniques
%J International Journal of Computer Applications
%@ 0975-8887
%V 56
%N 3
%P 35-41
%D 2012
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Implementation of Original CORDIC, Control CORDIC and Angle Recoding CORDIC of 16-bit, 24-bit and 32-bit fixed point number have been done in this paper. VHDL is used to modelled these architectures. Original CORDIC, Control CORDIC and Angle Recoding CORDIC are synthesized and targeted for Xilinx Virtex 5 FPGA and the results calculated for 16-bit and 24-bit has shown satisfactory improvement in speed.

References
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Index Terms

Computer Science
Information Sciences

Keywords

CORDIC algorithm VHDL Fixed Point representation

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