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Network on Chip for 3D Mesh Structure with Enhanced Security Algorithm in HDL Environment

by Adesh Kumar, Sonal Singhal, Piyush Kuchhal
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 59 - Number 17
Year of Publication: 2012
Authors: Adesh Kumar, Sonal Singhal, Piyush Kuchhal
10.5120/9638-4309

Adesh Kumar, Sonal Singhal, Piyush Kuchhal . Network on Chip for 3D Mesh Structure with Enhanced Security Algorithm in HDL Environment. International Journal of Computer Applications. 59, 17 ( December 2012), 6-12. DOI=10.5120/9638-4309

@article{ 10.5120/9638-4309,
author = { Adesh Kumar, Sonal Singhal, Piyush Kuchhal },
title = { Network on Chip for 3D Mesh Structure with Enhanced Security Algorithm in HDL Environment },
journal = { International Journal of Computer Applications },
issue_date = { December 2012 },
volume = { 59 },
number = { 17 },
month = { December },
year = { 2012 },
issn = { 0975-8887 },
pages = { 6-12 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume59/number17/9638-4309/ },
doi = { 10.5120/9638-4309 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T21:04:26.066589+05:30
%A Adesh Kumar
%A Sonal Singhal
%A Piyush Kuchhal
%T Network on Chip for 3D Mesh Structure with Enhanced Security Algorithm in HDL Environment
%J International Journal of Computer Applications
%@ 0975-8887
%V 59
%N 17
%P 6-12
%D 2012
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Network on chip (NOC) architecture is an approach to develop large and complex systems on a single chip. In this work 3D mesh topological structures has been implemented with enhanced TACIT Security in HDL environment. The architecture supports physical and architectural level design integration. Basic communication mechanism between resources is envisioned to be packet switched message passing through the switches. For the node identification in 3D networks 8 × 8 × 8 Mesh configuration is taken. A new Algorithm is proposed for secured data transmission among nodes. TACIT algorithm is used for data encryption and decryption and applicable for n bit block size and key. Design is implemented in Xilinx 14. 2 VHDL software, and functional simulation was carried out in Modelsim 10. 1 b, student edition. Hardware parameters such as size cost and timings are extracted from the design code.

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Index Terms

Computer Science
Information Sciences

Keywords

Very High Speed Integrated Circuit hardware Description language (VHDL) Network on chip (NOC) System on chip (SOC)

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