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Optimization of Pie-gate Bulk FinFET Structure

by S. L. Tripathi, Ramanuj Mishra, Narendra Vadthiya, R. A. Mishra
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 59 - Number 2
Year of Publication: 2012
Authors: S. L. Tripathi, Ramanuj Mishra, Narendra Vadthiya, R. A. Mishra
10.5120/9522-3930

S. L. Tripathi, Ramanuj Mishra, Narendra Vadthiya, R. A. Mishra . Optimization of Pie-gate Bulk FinFET Structure. International Journal of Computer Applications. 59, 2 ( December 2012), 34-39. DOI=10.5120/9522-3930

@article{ 10.5120/9522-3930,
author = { S. L. Tripathi, Ramanuj Mishra, Narendra Vadthiya, R. A. Mishra },
title = { Optimization of Pie-gate Bulk FinFET Structure },
journal = { International Journal of Computer Applications },
issue_date = { December 2012 },
volume = { 59 },
number = { 2 },
month = { December },
year = { 2012 },
issn = { 0975-8887 },
pages = { 34-39 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume59/number2/9522-3930/ },
doi = { 10.5120/9522-3930 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T21:05:04.392881+05:30
%A S. L. Tripathi
%A Ramanuj Mishra
%A Narendra Vadthiya
%A R. A. Mishra
%T Optimization of Pie-gate Bulk FinFET Structure
%J International Journal of Computer Applications
%@ 0975-8887
%V 59
%N 2
%P 34-39
%D 2012
%I Foundation of Computer Science (FCS), NY, USA
Abstract

In this paper we propose a novel Pie gate bulk FinFET structure for logic applications suitable for system-on-chip (SOC) requirements. The influence of gate at bottom to junction depth, misalignment was examined for deeper junctions and shallower junctions. It has shown that bulk FinFET with source/drain to body (S/D) junctions shallower than gate at bottom has equal or better subthreshold performance than SOI FinFET. Further, we extend the concept of heavy body doping in bulk FinFETs of Pie-gate structure. The characteristics of such bulk FinFET structure is analyzed by 3D device simulation and compared with SOI FinFET.

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Index Terms

Computer Science
Information Sciences

Keywords

Shallower junction Punchthrough stopper pie gate structure

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