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Reseach Article

Static-Noise-Margin Analysis of Conventional 6T SRAM Cell at 45nm Technology

by Nahid Rahman, B. P. Singh
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 66 - Number 20
Year of Publication: 2013
Authors: Nahid Rahman, B. P. Singh
10.5120/11200-6274

Nahid Rahman, B. P. Singh . Static-Noise-Margin Analysis of Conventional 6T SRAM Cell at 45nm Technology. International Journal of Computer Applications. 66, 20 ( March 2013), 19-23. DOI=10.5120/11200-6274

@article{ 10.5120/11200-6274,
author = { Nahid Rahman, B. P. Singh },
title = { Static-Noise-Margin Analysis of Conventional 6T SRAM Cell at 45nm Technology },
journal = { International Journal of Computer Applications },
issue_date = { March 2013 },
volume = { 66 },
number = { 20 },
month = { March },
year = { 2013 },
issn = { 0975-8887 },
pages = { 19-23 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume66/number20/11200-6274/ },
doi = { 10.5120/11200-6274 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T21:22:57.040412+05:30
%A Nahid Rahman
%A B. P. Singh
%T Static-Noise-Margin Analysis of Conventional 6T SRAM Cell at 45nm Technology
%J International Journal of Computer Applications
%@ 0975-8887
%V 66
%N 20
%P 19-23
%D 2013
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Static random access memory (SRAM) is a type of volatile semiconductor memory to store binary logic '1' and '0'. The SRAM sizing has been scaled down due to the increase density of SRAM in System-On-Chip (SoC) and other integrated devices, which works on lower supply voltage. This leads to considerable amount of power saving, but the stability and performance of the SRAM circuit is also being affected due to the scaling of supply voltage. The lower supply voltage reduces the Static Noise Margin upon which the stability of the SRAM cell depends. With lower Vdd, the delay of SRAM cell increases considerably and speed of the SRAM will be lowered. This paper discusses about the noise effect on Read SNM and Write SNM of Conventional 6T SRAM cell. This paper also presents the effect of device parameters on Conventional 6T SRAM cell which increases the cell stability without increasing transistor count at 45nm technology.

References
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Index Terms

Computer Science
Information Sciences

Keywords

Static Noise Margin (SNM) and Stability