CFP last date
20 May 2024
Reseach Article

Design and Performance Analysis of 32 and 64 Point FFT using Multiple Radix Algorithms

by K. Sowjanya, Leela Kumari Balivada
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 78 - Number 1
Year of Publication: 2013
Authors: K. Sowjanya, Leela Kumari Balivada
10.5120/13454-1122

K. Sowjanya, Leela Kumari Balivada . Design and Performance Analysis of 32 and 64 Point FFT using Multiple Radix Algorithms. International Journal of Computer Applications. 78, 1 ( September 2013), 25-29. DOI=10.5120/13454-1122

@article{ 10.5120/13454-1122,
author = { K. Sowjanya, Leela Kumari Balivada },
title = { Design and Performance Analysis of 32 and 64 Point FFT using Multiple Radix Algorithms },
journal = { International Journal of Computer Applications },
issue_date = { September 2013 },
volume = { 78 },
number = { 1 },
month = { September },
year = { 2013 },
issn = { 0975-8887 },
pages = { 25-29 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume78/number1/13454-1122/ },
doi = { 10.5120/13454-1122 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T21:50:31.527724+05:30
%A K. Sowjanya
%A Leela Kumari Balivada
%T Design and Performance Analysis of 32 and 64 Point FFT using Multiple Radix Algorithms
%J International Journal of Computer Applications
%@ 0975-8887
%V 78
%N 1
%P 25-29
%D 2013
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Always technical designers choice includes algorithms, flowcharts, programming etc. , and end users requires the given input and application output. Based upon this view, this paper focus on the advancement of the Fast Fourier Transform (FFT), by doing design and observing the performance analysis of the 32 FFT[1] and 64 point FFT, using Radix-2, Radix-8[17] and Split Radix algorithm. The algorithm is developed by Decimation-In-Time (DIT) of the Fast Fourier Transform (FFT), using VHDL as a design entity and synthesis are performed in Xilinx ISE Design Suite 13. 2 version. Using synthesis results performance analysis is done between 32 and 64 point Fast Fourier Transform (FFT)[16] in terms of speed and computational complexity.

References
  1. Asmita Haveliya, "Design and simulation of 32-point FFT using Radix-2 Algorithm for FPGA Implmentation",2012 second International conference on Advanced Computing and Communication Technologies.
  2. sneha N. Kherde, Meghana Hasamnis, " Efficient Design and Implementation of FFT", International Journal of Engineering science and Technology(IJEST), ISSN:0975-5462 NCICT Special Issue Feb 2011.
  3. Ahmed Saeed,M. Elabably, G. abdelfadeel and M. I. Eladawy, "Efficient FPGA implementation of FFT/IFFT Processor", international journal of circuits and signal processing,Issue3,Volume3,2009.
  4. Alam V. Oppenhem, Ronald W. Schaler with John R. back , Discrete Time Signal Processing, second Edition.
  5. B. Parhami, Computer Arithmetic, Algorithms and Hardware Designs, 1999.
  6. James W. Cooley and John W. Tukey, An Algorithm for the Machine Calculation of Complex Fourier Series.
  7. Saad Bouguezel, M. Omair Ahmad, "Improved Radix-4 and Radix-8 Algorithms", IEEE Department of Electrical and Computer Engineering Concordia University 1455 de Maisenneuve Blvd west Montreal, P. q. ,Canada.
  8. Ali saidi, "Decimation in Frequency FFT Algorithm", Motorola Applied Research, Paging and Wireless Data Group Boynton Beach.
  9. Wei-Hsin chang and Truong Q. Nguyen fellow IEEE, "On the Fixed point Accuracy Analysis of FFT Algorithms",IEEE Transactions ON Signal Processing, Vol. 56, No. 10, Oct 2008.
  10. Jesus Gracia, Juan A. Michell, Gustavo Ruiz, Angel M. Burón, Dept. de Electrónica y Computadores, Facultad de Ciencias, Univ. de Cantabria, Avda, "FPGA realization of a Split Radix FFT processor", Los Castros s/n, 39005 Santander, SPAIN.
  11. HardwareDescriptionLanguage. URL: http://en. wikipedia. org/wiki/Hardware_description_language.
  12. Very High Speed Integrated Circuit Hardware Description Language URL: http://electrosofts. com/vhdl/
  13. Peter J. Ashenden, The Designer's Guide to VHDL, Second Edition.
  14. N. Weste, M. Bickerstaff, T. Arivoli, P. J. Ryan, J. W. Dalton, D. J. Skellern", and T. M. Percivalt "A 50Mhz 16Point-FFT processor for WLAN applications".
  15. Rizalafande Che Ismail and Razaidi Hussin "High Performance Complex Number Multiplier Using Booth-Wallace Algorithm" School of Microelectronic Engineering Kolej University Kejuruteraan Utara Malaysia.
  16. Bergland, G. D. "A Guided Tour of the Fast Fourier Transform. " IEEE Spectrum 6, 41-52, July 1969.
  17. "Design of a radix-8/4/2 FFT processor for OFDM Systems", Jungmin Park ,Computer Engineering ,Iowa State University.
Index Terms

Computer Science
Information Sciences

Keywords

Radix-2 Radix-8 Split-Radix Synthesis