CFP last date
20 May 2024
Reseach Article

Efficient Method for Look-Up-Table Design in Memory based FIR Filters

by Md. Zameeruddin, Sangeetha Singh
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 78 - Number 16
Year of Publication: 2013
Authors: Md. Zameeruddin, Sangeetha Singh
10.5120/13606-1396

Md. Zameeruddin, Sangeetha Singh . Efficient Method for Look-Up-Table Design in Memory based FIR Filters. International Journal of Computer Applications. 78, 16 ( September 2013), 16-22. DOI=10.5120/13606-1396

@article{ 10.5120/13606-1396,
author = { Md. Zameeruddin, Sangeetha Singh },
title = { Efficient Method for Look-Up-Table Design in Memory based FIR Filters },
journal = { International Journal of Computer Applications },
issue_date = { September 2013 },
volume = { 78 },
number = { 16 },
month = { September },
year = { 2013 },
issn = { 0975-8887 },
pages = { 16-22 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume78/number16/13606-1396/ },
doi = { 10.5120/13606-1396 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T21:51:43.652675+05:30
%A Md. Zameeruddin
%A Sangeetha Singh
%T Efficient Method for Look-Up-Table Design in Memory based FIR Filters
%J International Journal of Computer Applications
%@ 0975-8887
%V 78
%N 16
%P 16-22
%D 2013
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Distributed arithmetic (DA)-based computation is well known for efficient memory-based implementation of Finite impulse response (FIR) filter where the filter outputs are computed as inner-product of input-sample vectors and filter-coefficient vector. In this paper, we show that the LUT multiplier based approach in which the memory elements store all the possible values of product of filter co-efficient will be the efficient in terms of area with the same throughput in comparison of DA. We present two new approaches to LUT-based multiplication, which could be used to reduce the memory size to half of the conventional LUT-based multiplication. The proposed method in this paper have half memory required than the existing DA method .The DA and the proposed LUT method are simulated and synthesized using the Xilinx tool and the memory required by the proposed LUT is nearly 50% lesser than the DA.

References
  1. J.G.Proakis and D. G. Manolakis, Digital Signal Processing: Principles, Algorithms and Applications. Upper Saddle River, NJ: Prentice-Hall, 1996.
  2. G.Mirchandani, R. L. Zinser Jr., and J. B. Evans, “A new adaptive noise cancellation scheme in the presence of crosstalk [speech signals],”IEEE Trans. Circuits Syst. II, Analog. Digit. Signal Process,vol. 39, no. 10, pp. 681– 694, Oct. 1995
  3. D. Xu and J. Chiu, “Design of a high-order FIR digital filtering and variable gain ranging seismic data acquisition system,” in Proc. IEEE Southeastcon’93, Apr. 1993, p. 6
  4. K. K. Parhi, VLSI Digital Signal Procesing Systems: Design and Implementation .New York: Wiley, 1999
  5. D. G. Elliott, M. Stumm, W. M. Snelgrove, C. Cojocaru, and R.Mckenzie, “Computational RAM: Implementing processors in memory,” IEEE Trans. Design Test Compute., vol. 16, no. 1, pp. 32–41,Jan. 1999.H.-R. Lee, C.-W. Jen and C.-M. Liu, “On the design automation of the memory-based VLSI architectures for FIR filters,” IEEE Trans.Consum. Electron., vol. 39, no. 3, pp. 619–629, Aug. 1993
  6. H.-R. Lee, C.-W. Jen and C.-M. Liu, “On the design automation of the memory-based VLSI architectures for FIR filters,” IEEE Trans.Consum. Electron., vol. 39, no. 3, pp. 619–629, Aug. 1993
  7. S. A. White, “Applications of the distributed arithmetic to digital signal processing:A tutorial review,” IEEE ASSP Mag., vol. 6, no. 3, p. 5–19,Jul. 1989
  8. H.-C. Chen, J.-I. Guo, T.-S. Chang, and C.-W. Jen, “A memory-efficient- realization of cyclic convolution and its application to discrete cosine transform,” IEEE Trans. Circuits Syst. Video Technol., vol. 15,no. 3, pp. 445–453, Mar. 2005
  9. P. K. Meher, S. Chandrasekaran, and A. Amira, “FPGA realization of FIR filters by efficient and flexible systolization using distributed arithmetic, ”IEEE Trans. Signal Process., vol. 56, no. 7, pp. 3009–3017, Jul.2008.
  10. J.-I. Guo, C.-M. Liu, and C.-W. Jen, “The efficient memory-based VLSI array design for DFT and DCT,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process, vol. 39, no. 10, pp. 723–733, Oct. 1992.
  11. A. K. Sharma, Advanced Semiconductor Memories: Architectures, Designs, and Applications. Piscataway, NJ: IEEE Press, 2003.
  12. E. John, “Semiconductor memory circuits,” in Digital Design and Fabrication, V. G. Oklobdzija, Ed. Boca Raton, FL: CRC Press, 2008.
Index Terms

Computer Science
Information Sciences

Keywords

Distributed Arithmetic (DA) FIR filter Look-Up-Table.