CFP last date
20 May 2024
Call for Paper
June Edition
IJCA solicits high quality original research papers for the upcoming June edition of the journal. The last date of research paper submission is 20 May 2024

Submit your paper
Know more
The week's pick
Responsive image
Enhancing Privacy Preservation: Multi-Attribute Protection with P-Sensitive K-Anonymity

Twinkle Patel Kiran Amin
Random Articles
Reseach Article

Comparative Analysis on Carrier Overlapping PWM Strategies for Seven Level Symmetrical Inverter

by K. Venkataramanan, B. Shanthi, S. P. Natarajan
journal cover thumbnail

International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 79 - Number 12
Year of Publication: 2013
Authors: K. Venkataramanan, B. Shanthi, S. P. Natarajan
10.5120/13795-1872

K. Venkataramanan, B. Shanthi, S. P. Natarajan . Comparative Analysis on Carrier Overlapping PWM Strategies for Seven Level Symmetrical Inverter. International Journal of Computer Applications. 79, 12 ( October 2013), 35-40. DOI=10.5120/13795-1872

@article{ 10.5120/13795-1872,
author = { K. Venkataramanan, B. Shanthi, S. P. Natarajan },
title = { Comparative Analysis on Carrier Overlapping PWM Strategies for Seven Level Symmetrical Inverter },
journal = { International Journal of Computer Applications },
issue_date = { October 2013 },
volume = { 79 },
number = { 12 },
month = { October },
year = { 2013 },
issn = { 0975-8887 },
pages = { 35-40 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume79/number12/13795-1872/ },
doi = { 10.5120/13795-1872 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T21:52:50.106833+05:30
%A K. Venkataramanan
%A B. Shanthi
%A S. P. Natarajan
%T Comparative Analysis on Carrier Overlapping PWM Strategies for Seven Level Symmetrical Inverter
%J International Journal of Computer Applications
%@ 0975-8887
%V 79
%N 12
%P 35-40
%D 2013
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Multilevel Inverters have emerged in power conversion systems due to their lower output harmonics and high power capability. This paper presents the performance analysis of a new seven level symmetrical multilevel inverter with reduced number of switches using Carrier Overlapping PWM strategies. Due to switch combination redundancies, there are certain degrees of freedom to generate multilevel AC output. The results are compared with sine and Trapezoidal references in Carrier overlapping technique. Harmonic analysis and performance measures for various modulation indices have been carried out.

References
  1. N. P. Schibli, T. Nguyen, and A. C. Rufer, "A three-phase multilevel converter for high-power induction motors," IEEE Trans. Power. Electron. ,vol. 13, no. 5, pp. 978–986, Sep. 1998.
  2. M. Leon Tolbert, G. Thomas. Habetler, "Novel Multilevel Inverter Carrier-Based PWM Method", IEEE Transactions on Industry Applications, Vol. 35, No. 5, September/October 1999.
  3. Donald Grahame Holmes, P. Brendam and Mcgrath,"Opportunities for Harmonic Cancellation with Carrier-Based PWM for Two-Level and Multilevel Cascaded Inverters", IEEE Trans. on Industry Applications, 2001,37(2), 574-582.
  4. S. G. Lee,F. W. Kang,Y. H. Lee and D. S. Hyun: The carrier based PWM method for voltage balancing of flying capacitor Multilevel Inverter,IEEE Power Electronics Spec. Conf. Record. ,Vol 1,2001, 126-131
  5. Brendan Peter McGrath, Donald Grahame Holmes, "An Analytical Technique for the Determination of Spectral Components of Multilevel Carrier-Based PWM Methods", IEEE Transactions on Industrial Electronics, Vol. 49, No. 4, August 2002.
  6. Dae-Wook Kang, Yo-Han Lee, Bum-Seok Suh, Chang-Ho Choi and Dong-Seok Hyun, An Improved Carrier-Based SVPWM Method Using Leg Voltage Redundancies in Generalized Cascaded Multilevel Inverter Topology. IEEE Transactions on Power Electronics, Vol. 18, No. 1, January 2003
  7. Brendan Peter McGrath, Donald Grahame Holmes and Thomas Lipo,"Optimized Space Vector Switching Sequences for Multilevel Inverters IEEE Transactions on Power Electronics, Vol. 18, No. 6, November 2003.
  8. Ayob,S. M. ; and Salam. z. A new PWM scheme for cascaded multilevel inverter using trapezoidal modulation signals. Research report of university teknologi Malaysia, 2004, 242-246,.
  9. L. Ben-brahim and S. Tadakuma, Novel Multilevel Carrier Based PWM Control Method for GTO Inverter in Low Index Modulation Region IEEE Transactions on Power Electronics, Vol. 18, No. 1, January 2006 42(1), 121-127.
  10. Al-Judi, A. ; Nowicki, E. ; and Bierk, H. (2007). Voltage switching scheme for harmonic reduction in multilevel inverters. Canadian Conference on Electrical and Computer Engineering, 2007. CCECE 2007, Rec. : 0840-7789/07, 709-712.
  11. S. Krishna, "Harmonic Elimination by Selection of Switching Angle and DC Voltages in Cascaded Multilevel Inverters", in proc. 15th National power system conference (NPSC), 2008, pp 119-124.
  12. B. Shanthi, S. P. Natarajan, "Carrier Overlapping PWM Methods for Single Phase Cascaded Five Level Inverter", International Journal of Science and Technology of Automatic Control & Computer Engineering (IJ-STA, Tunisia). Special issue on Control of Electrical Machines, 2008, 590-601.
  13. Rokan Ali Ahmed, S. Mekhilef, Hew Wooi Ping, "New Multilevel Inverter Topology with Reduced Number of Switches", Proceedings of the 14th Inter. Middle East Power Systems Conf. (MEPCON'10), Dec 19-21, 2010 pp 565-570.
  14. Nikhil Valsan. K and Joseph. K. D "A Reduced Switch Multilevel Inverter for Harmonic Reduction. " 2012 Asia-Pacific Power and Energy Engineering Conference, (2012): 1-4
Index Terms

Computer Science
Information Sciences

Keywords

COPWM Sub harmonic PWM CFD Total Harmonic Distortion and VRMS

Powered by PhDFocusTM