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Hybrid based Self-Test Solution for Embedded System on Chip
| International Journal of Computer Applications |
| Foundation of Computer Science (FCS), NY, USA |
| Volume 84 - Number 12 |
| Year of Publication: 2013 |
| Authors: Sherif I. Morsy, Mohamed H. El-mahlawy, Gouda I. Mohamed |
10.5120/14626-2973
|
Sherif I. Morsy, Mohamed H. El-mahlawy, Gouda I. Mohamed . Hybrid based Self-Test Solution for Embedded System on Chip. International Journal of Computer Applications. 84, 12 ( December 2013), 7-14. DOI=10.5120/14626-2973
Abstract
Microcontrollers have become a widely accepted architecture for highly complex embedded systems on a single chip (SoC). It consists of deeply embedded heterogeneous components with poor accessibility makes their testing process a difficult task using hardware based self-test (HBST). Software-based self-test (SBST) is considered to be a promising testing technology for these systems. Almost every SoC contains at least one embedded processor, SBST utilize this processor for test pattern generation (TPG) and test response compaction (TRC) based on its instruction set, then test response will be unloaded and evaluated using external automatic test equipment (ATE). In this paper, SBST strategy disadvantages in microcontroller testing will be identified. Then, a new testing approach that combines both the HBST and the SBST, called hybrid-based self-test (HYBST) will be introduced. Based on a divide-and-conquer approach, HYBST identify microcontroller's components and their corresponding component operations. Feasibility and effectiveness of HYBST and SBST methodologies will be assessed by applying them to a Microchip® PIC16F877A and PIC18F452 in terms of memory usage, time consumption and number of tested modules found in microcontrollers.
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