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STG-NoC: A Tool for Generating Energy Optimized Custom Built NoC Topology
| International Journal of Computer Applications |
| Foundation of Computer Science (FCS), NY, USA |
| Volume 85 - Number 15 |
| Year of Publication: 2014 |
| Authors: Surbhi Jain, Naveen Choudhary, Dharm Singh |
10.5120/14918-3481
|
Surbhi Jain, Naveen Choudhary, Dharm Singh . STG-NoC: A Tool for Generating Energy Optimized Custom Built NoC Topology. International Journal of Computer Applications. 85, 15 ( January 2014), 22-26. DOI=10.5120/14918-3481
Abstract
Network on Chip (NoC) has emerged as a viable solution to the complex communication requirements of constantly evolving System on Chip (SoC). The communication centric architecture of NoC can be optimized across a variety of parameters as per the design requirements. With the development of customized application the inclination has shifted from regular architectures to irregular topology which leaves researchers with larger spectrum of optimization parameters. Many heuristic methods have been explored as the optimization problems encountered are NP-hard. This paper presents a customized topology generator STG-NoC which implements a heuristic technique based on simulated annealing for achieving the objective of energy optimization.
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