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A Methodology for Very Low Power and Small Size Capsule Manufacturing for Wireless Capsule Endoscopy

by Preeti Rathore, Deepak Tiwary, Niraj Kumar
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 95 - Number 22
Year of Publication: 2014
Authors: Preeti Rathore, Deepak Tiwary, Niraj Kumar
10.5120/16725-6905

Preeti Rathore, Deepak Tiwary, Niraj Kumar . A Methodology for Very Low Power and Small Size Capsule Manufacturing for Wireless Capsule Endoscopy. International Journal of Computer Applications. 95, 22 ( June 2014), 10-14. DOI=10.5120/16725-6905

@article{ 10.5120/16725-6905,
author = { Preeti Rathore, Deepak Tiwary, Niraj Kumar },
title = { A Methodology for Very Low Power and Small Size Capsule Manufacturing for Wireless Capsule Endoscopy },
journal = { International Journal of Computer Applications },
issue_date = { June 2014 },
volume = { 95 },
number = { 22 },
month = { June },
year = { 2014 },
issn = { 0975-8887 },
pages = { 10-14 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume95/number22/16725-6905/ },
doi = { 10.5120/16725-6905 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T22:20:06.650061+05:30
%A Preeti Rathore
%A Deepak Tiwary
%A Niraj Kumar
%T A Methodology for Very Low Power and Small Size Capsule Manufacturing for Wireless Capsule Endoscopy
%J International Journal of Computer Applications
%@ 0975-8887
%V 95
%N 22
%P 10-14
%D 2014
%I Foundation of Computer Science (FCS), NY, USA
Abstract

We are presenting a method of reducing the size of traditional capsule used in wireless capsule endoscopy (WCE) for . The conventional wireless endoscopic capsule was manufactured on 18µm technology and its size is 26mmx11mm. Here we are using Ultrascale FinFET 16nm technology to reduce the size of capsule . By using this technique the Size of traditional capsule can be reduced by 11-12 % . Using this method leakage current content reduces and power consumption also reduces up to 50% than the traditional one. The device can be operated on a very low operating voltage and thus the life of battery increases. But after the advancement of FPGA technology, here we are emphasizing on ultra-scale technology with 16nm FINFET technology for fabrication of CMOS transistors using 16 nm technology 3D ICs. This method increases system performance and speed upto 2 folds and speed increases upto 30% .

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Index Terms

Computer Science
Information Sciences

Keywords

FinFET 16nm Technology Ultrascale MOSFET FPGA leakage current Capsule Endoscopy.