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Design of Reversible Code Converters for Quantum Computer based Systems

Published on January 2013 by Manjula Gandhi S, J Devishree
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Amrita International Conference of Women in Computing - 2013
Foundation of Computer Science USA
AICWIC - Number 3
January 2013
Authors: Manjula Gandhi S, J Devishree
5724e01e-f018-4477-9bc1-b76ced62ee06

Manjula Gandhi S, J Devishree . Design of Reversible Code Converters for Quantum Computer based Systems. Amrita International Conference of Women in Computing - 2013. AICWIC, 3 (January 2013), 27-30.

@article{
author = { Manjula Gandhi S, J Devishree },
title = { Design of Reversible Code Converters for Quantum Computer based Systems },
journal = { Amrita International Conference of Women in Computing - 2013 },
issue_date = { January 2013 },
volume = { AICWIC },
number = { 3 },
month = { January },
year = { 2013 },
issn = 0975-8887,
pages = { 27-30 },
numpages = 4,
url = { /proceedings/aicwic/number3/9879-1321/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Proceeding Article
%1 Amrita International Conference of Women in Computing - 2013
%A Manjula Gandhi S
%A J Devishree
%T Design of Reversible Code Converters for Quantum Computer based Systems
%J Amrita International Conference of Women in Computing - 2013
%@ 0975-8887
%V AICWIC
%N 3
%P 27-30
%D 2013
%I International Journal of Computer Applications
Abstract

Reversible logic is one of the latest technologies having promising applications in Quantum Computing. Reversible code converters are a class of reversible circuits that are used to convert one type of code in to another. Code conversion is a widely used process in digital systems for reasons such as enhancing security of data, reducing the complexity of arithmetic operations and thereby reducing the hardware required. This paper presents the design of reversible code converters such as converting Binary to BCD code, BCD to excess-3 code, Binary to Gray code and BCD to Gray code. Circuits have been designed and synthesized using QCViewer. The circuits are evaluated in terms of number of qubits, ancilla inputs, garbage outputs and quantum cost.

References
  1. Alex Parent and Jacob Parker, May 2012, QCviewer0. 8, http://qcirc. iqc. uwaterloo. ca
  2. De Vos, A. 2010. Reversible computer hardware. Electronic Notes in Theoretical Computer Science, 253(6), 17-22.
  3. Godse, P. A , Godse, 2007, Digital Electronics, Technical Publications Pune.
  4. Bennett, C. H. 1973. Logical reversibility of computation. IBM journal of Research and Development, 17(6), 525-532. .
  5. Bennett, C. H. 1988. Notes on the history of reversible computation. IBM Journal of Research and Development, 32(1), 16-23.
  6. Bhagyalakshmi, H. R. , & Venkatesha, M. K. 2010. An improved design of a multiplier using reversible logic gates. International journal of engineering science and technology, 2(8), 3838-3845.
  7. Thapliyal, H. , & Srinivas, M. B. 2005, August. Novel design and reversible logic synthesis of multiplexer based full adder and multipliers. In Circuits and Systems, 2005. 48th Midwest Symposium on (pp. 1593-1596). IEEE.
  8. Krishnaveni, D. , & Geetha Priya, M. 2010. A Novel Design of Reversible Serial and Parallel Adder/Subtractor. International Journal of Engineering Science and Technology, 3, 2280-2288.
  9. Landauer. R, 1961, "Irreversibility and Heat Generation in the Computational Process", IBM Journal of Research and Development, 5, pp. 183-191.
  10. Mohammadi, M. , Eshghi, M. , Haghparast, M. , & Bahrololoom, A. (2008). Design and optimization of reversible BCD adder/subtractor circuit for quantum and nanotechnology based systems. World Applied Sciences Journal, 4(6), 787-792. .
  11. Nielsen, M. A. , & Chuang, I. L. 2010. Quantum computation and quantum information. Cambridge university press.
  12. Perkowski, M. 2000. Reversible Computation for Beginners. Lecture Series.
  13. Yelekar R. P, Shiwande. S S , 2011, Introduction to Reversible Logic gates and its Application, 2nd National Conference on Information and Communication Technology, pp 5-9.
  14. James, R. K. , Shahana, T. K. , Jacob, K. P. , & Sasi, S. 2007, November. A new look at reversible logic implementation of decimal adder. In System-on-Chip, 2007 International Symposium on (pp. 1-4). IEEE.
  15. Chinmaye, R. , & Kn, M. 2012. Design, Optimization and Synthesis of Efficient Reversible Logic Binary Decoder. International Journal of Computer Applications, 46(6), 45-51.
  16. Rangaraju, H. G. , Venugopal, U. , Muralidhara, K. N. , & Raja, K. B. 2010. Low Power Reversible Parallel Binary Adder/Subtractor. arXiv preprint arXiv:1009. 6218. .
  17. Sahni. V, 2007, "Quantum Computing", Tata McGraw-Hill, New Delhi, India.
  18. Van Rentergem, Y. , & De Vos, A. 2005. Optimal design of a reversible full adder. International Journal of Unconventional Computing, 1(4), 339.
Index Terms

Computer Science
Information Sciences

Keywords

Code Converters Quantum Computer Quantum Gates Qubit Reversible Logic