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Reseach Article

Design and Simulation of Hybrid SET-CMOS based Hysteresis Circuits: Schmitt Trigger, with their Realization

Published on June 2013 by A. Jana, R. S. Halder, S. S. Singh, J. K. Sing, Subir Kumar Sarkar
International Conference on Communication, Circuits and Systems 2012
Foundation of Computer Science USA
IC3S - Number 4
June 2013
Authors: A. Jana, R. S. Halder, S. S. Singh, J. K. Sing, Subir Kumar Sarkar
600b7bb3-18c6-4b31-8f24-af5ed6aa1572

A. Jana, R. S. Halder, S. S. Singh, J. K. Sing, Subir Kumar Sarkar . Design and Simulation of Hybrid SET-CMOS based Hysteresis Circuits: Schmitt Trigger, with their Realization. International Conference on Communication, Circuits and Systems 2012. IC3S, 4 (June 2013), 10-12.

@article{
author = { A. Jana, R. S. Halder, S. S. Singh, J. K. Sing, Subir Kumar Sarkar },
title = { Design and Simulation of Hybrid SET-CMOS based Hysteresis Circuits: Schmitt Trigger, with their Realization },
journal = { International Conference on Communication, Circuits and Systems 2012 },
issue_date = { June 2013 },
volume = { IC3S },
number = { 4 },
month = { June },
year = { 2013 },
issn = 0975-8887,
pages = { 10-12 },
numpages = 3,
url = { /proceedings/ic3s/number4/12305-1345/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Proceeding Article
%1 International Conference on Communication, Circuits and Systems 2012
%A A. Jana
%A R. S. Halder
%A S. S. Singh
%A J. K. Sing
%A Subir Kumar Sarkar
%T Design and Simulation of Hybrid SET-CMOS based Hysteresis Circuits: Schmitt Trigger, with their Realization
%J International Conference on Communication, Circuits and Systems 2012
%@ 0975-8887
%V IC3S
%N 4
%P 10-12
%D 2013
%I International Journal of Computer Applications
Abstract

Hybrid SET-CMOS circuits which combine the merits of both the SET [Single Electron Transistor] and CMOS promises to be a practical implementation for future low power ultra-dense VLSI/ULSI circuit design. In this work, an SET-CMOS hybrid hysteresis circuit is proposed. The MIB model for SET and BSIM4 model for CMOS are used. The operation of the proposed circuit is verified in Tanner environment.

References
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  3. Anindya Jana, Rajat Suvra Halder, J. K. Sing, Subir Kumar Sarkar,"Design and simulation of hybrid SET CMOS based sequential circuits", Journal of Nano and Electronic Physics, Vol. 4 No. 2,02004(5pp)(2012).
  4. Uchida, K. , et al. , "Programmable Single-Electron Transistor Logic for Low-Power Intelligent Si LSI," Proc. of. ISSCC 2002, Vol. 2, pp. 162– 453. Spector, A. Z. 1989. Achieving application requirements. In Distributed Systems, S. Mullender
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Index Terms

Computer Science
Information Sciences

Keywords

Single Electron Transistor Cmos Hybrid Cmos-set Circuits Mib T-spice