The dynamic power requirement of CMOS circuits is rapidly becoming a major concern in the design of personal information systems and large computers. Battery operated portable computers and wireless communication products have often been used. Thus low power integrated circuit design has been strongly demanded for implementation. One of the promising techniques of low power design is adiabatic logic. Adiabatic means no exchange of energy with the environment. This paper compares between positive feedback adiabatic inverter (PFAL) and 2N2N2P adiabatic logic inverter. The simulation is done using 0. 35 TSMC CMOS technology.

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Adiabatic Vlsi Pfal 2n2n2p Tsmc