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Reseach Article

Network on Chip - Design Aspects

Published on September 2011 by Rakhi Mutha
Innovative Conference on Embedded Systems, Mobile Communication and Computing
Foundation of Computer Science USA
ICEMC2 - Number 1
September 2011
Authors: Rakhi Mutha
1dffcc12-5fa5-4b44-91fa-6c1523850df6

Rakhi Mutha . Network on Chip - Design Aspects. Innovative Conference on Embedded Systems, Mobile Communication and Computing. ICEMC2, 1 (September 2011), 16-19.

@article{
author = { Rakhi Mutha },
title = { Network on Chip - Design Aspects },
journal = { Innovative Conference on Embedded Systems, Mobile Communication and Computing },
issue_date = { September 2011 },
volume = { ICEMC2 },
number = { 1 },
month = { September },
year = { 2011 },
issn = 0975-8887,
pages = { 16-19 },
numpages = 4,
url = { /proceedings/icemc2/number1/3518-icemc004/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Proceeding Article
%1 Innovative Conference on Embedded Systems, Mobile Communication and Computing
%A Rakhi Mutha
%T Network on Chip - Design Aspects
%J Innovative Conference on Embedded Systems, Mobile Communication and Computing
%@ 0975-8887
%V ICEMC2
%N 1
%P 16-19
%D 2011
%I International Journal of Computer Applications
Abstract

The Network-on-Chip is a packet switched platform for single chip systems which scales well to an arbitrary number of processor like resources. The network-on-chip (NoC) design paradigm is seen as a way of enabling the integration of an exceedingly high number of computational and storage blocks in a single chip. This provides vertical integration of physical and architectural levels in system design. A chip consists of contiguous areas called regions, which are physically isolated from each other but have special mechanism for communication among each other. The NOC architecture essentially is the on chip communication infrastructure comprising the physical layer, the data link layer and the network layer of the OSI protocol stack. NOC architecture, a general purpose on-chip interconnection network replaces the traditional design- specific global on-chip wiring, by the use of switching fabric or routers to connect IP cores or processing elements (PEs).

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Index Terms

Computer Science
Information Sciences

Keywords

Packet switching NOC On chip communication NOC design