CFP last date
20 May 2024
Reseach Article

Dynamic Distribution Of Memory for Switch Architecture

Published on June 2013 by Vishnu Priya.a, Senthil Kumar P
International Conference on Innovation in Communication, Information and Computing 2013
Foundation of Computer Science USA
ICICIC2013 - Number 3
June 2013
Authors: Vishnu Priya.a, Senthil Kumar P
aeb4b14d-e3d7-49d3-a009-eff0839541b6

Vishnu Priya.a, Senthil Kumar P . Dynamic Distribution Of Memory for Switch Architecture. International Conference on Innovation in Communication, Information and Computing 2013. ICICIC2013, 3 (June 2013), 23-31.

@article{
author = { Vishnu Priya.a, Senthil Kumar P },
title = { Dynamic Distribution Of Memory for Switch Architecture },
journal = { International Conference on Innovation in Communication, Information and Computing 2013 },
issue_date = { June 2013 },
volume = { ICICIC2013 },
number = { 3 },
month = { June },
year = { 2013 },
issn = 0975-8887,
pages = { 23-31 },
numpages = 9,
url = { /proceedings/icicic2013/number3/12276-0157/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Proceeding Article
%1 International Conference on Innovation in Communication, Information and Computing 2013
%A Vishnu Priya.a
%A Senthil Kumar P
%T Dynamic Distribution Of Memory for Switch Architecture
%J International Conference on Innovation in Communication, Information and Computing 2013
%@ 0975-8887
%V ICICIC2013
%N 3
%P 23-31
%D 2013
%I International Journal of Computer Applications
Abstract

Interconnection networks are a key component of a variety of systems. In real time, low-latency and contention-free interconnection networks are demanded for the execution of many applications in systems . In modern interconnection networks it is mandatory the use of an effective congestion management technique in order to keep network performance at maximum level under any situations. Although congestion may be avoided by scaling the network size, but the current trends are to reduce overall equipment cost and power consumption of a network ,by plummeting the number of network components. Thus, the network will be prone to congestion, thereby becoming congestion free is mandatory for an efficient & effective network . Therefore, in this dissertation we describe the new congestion management technique (RECN-IQDD) suitable for any type of IQ (Input queue switch architecture: only queues at input port of a switch) switches with enhanced RECN(Regional Explicit Congestion Notification : an efficient Head-of-Line block elimination technique ,with a cost effective Switching architecture to face the challenges of congestion management, has been recently proposed for Advanced Switching (AS) . The idea behind RECN-IQDD is, starting with a simple input queued switch with a single queue per input port, to add some extra queues dynamically allocated for storing congested packets ,to avoid HOL blocking and Distributed deallocates of set aside when congestion vanishes . so, HOL blocking is completely eliminated with less number of queues . Regarding the performance it leads to a significant reduction of the data memory area required at each port in the reduction factor of 5 times than RECN-CIOQ (Combined Input Output Queue - have queues at both Input port & Output port of a switch) and avoids the use of explicit congestion notifications and token-exchanging packets .

References
  1. An evolution to crossbar switches with virtual output queuing and buffered cross points by Yoshigoe, K. Christensen, K. J. Univ. of South Florida, FL, USA; Network, IEEE,Sept. -Oct. 03 Volume: 7, Issue: 5
  2. Hardware implementation of a high-speed Symmetric crossbar switch by Arash Haidari-Khabbaz
  3. Achieving 100% Throughput in an Input-Queued Switch by Nick McKeown ,Venkat Anantharam Jean Walrand
  4. Input versus Output Queueing on a Space-Division Packet Switch," M. J. Karol, M. G. Hluchyj, and S. P. Morgan, IEEE Trans. Comm. , vol. 35, pp. 1347-1356, 1987.
  5. "High-Speed Switch Scheduling for Local-Area Networks," ACM Trans. Computer Systems, vol. 11, no. 4, pp. 319-352, Nov. 1993.
  6. T. Anderson, S. Owicki, J. Saxe, and C. Thacker, "High-Speed Switch Scheduling for Local-Area Networks", ACM Trans. on Computer Systems, vol. 11, no. 4, pp. 319–352, Nov. 1993.
  7. E. Baydal, P. López and J. Duato, "A Congestion Control Mech- anism for Wormhole Networks", in Proc. 9th. Euromicro Work- shop Parallel & Distributed Processing, pp. 19–26, Feb. 2001.
  8. L. S. Brakmo and L. L. Peterson, "TCP Vegas: End To End Congestion Avoidance on a Global Internet", IEEE Journal on Selected Areas in Communication, vol. 13, no. 8, pp. 1465–1470
  9. A Switch Architecture Guaranteeing QoS Provision and HOL Blocking Elimination by Alejandro Mart?´nez, Pedro J. Garc?´a, Francisco J. Alfaro, Jose´ L. Sa´nchez,Jose´ Flich, Francisco J. Quiles, and Jose´ Diatom Parallel and distributed systems, vol. 20, no. 1, january 2010
  10. L. S. Brakmo and L. L. Peterson, "TCP Vegas: End To End Congestion Avoidance on a Global Internet", IEEE Journal on Selected Areas in Communication, vol. 13, no. 8, 1995.
  11. W. J. Dally, "Virtual-channel flow control," IEEE Trans. on Parallel and Distributed Systems, vol. 3, no. 2, pp. 194–205, March 1992.
  12. J. Dally and H. Aoki, "Deadlock-Free Adaptive Routing in Multicomputer Networks Using Virtual Channels", IEEE Trans. on Parallel and Distributed Systems, vol. 4, no. 4, April 1993.
  13. J. Duato, "A New Theory of Deadlock-Free Adaptive Routing in Wormhole Networks", IEEE Trans. on Parallel and Distributed Systems, vol. 4, no. 12, pp. 1320–1331, Dec. 1993.
  14. J. Duato, S. Yalamanchili, and L. M. Ni, Interconnection Net- works: An Engineering Approach (Revised printing), Morgan Kaufmann Publishers, 2003.
  15. D. Franco, I. Garces, and E. Luque, "A New Method to Make Communication Latency Uniform: Distributed Routing Bal- ancing", in Proc. ACM International Conference on Supercom- puting (ICS99), pp. 210–219, May 1999.
  16. P. T. Gaughan and S. Yalamanchili, "Adaptive Routing Pro- tocols for Hypercube Interconnection Networks," IEEE Com- puter, vol. 26, no. 5, pp. 12–23, May 1993.
  17. IBM BG/L Team, "An Overview of BlueGene/L Supercom- puter", in Proc. ACM Supercomputing Conference, Nov. 2002
Index Terms

Computer Science
Information Sciences

Keywords

Advanced Switching Congestion buffering Switching Flow Control