Call for Paper - November 2023 Edition
IJCA solicits original research papers for the November 2023 Edition. Last date of manuscript submission is October 20, 2023. Read More

Filtering Noise from Electrocardiogram using FIR filter with CSD coefficients

IJCA Proceedings on International Conference on Innovations in Information, Embedded and Communication Systems
© 2014 by IJCA Journal
ICIIECS - Number 3
Year of Publication: 2014
S. Sundar
S. Karthick
S. Valarmathy

S.sundar, S.karthick and S.valarmathy. Article: Filtering Noise from Electrocardiogram using FIR filter with CSD coefficients. IJCA Proceedings on International Conference on Innovations in Information, Embedded and Communication Systems ICIIECS(3):15-19, November 2014. Full text available. BibTeX

	author = {S.sundar and S.karthick and S.valarmathy},
	title = {Article: Filtering Noise from Electrocardiogram using FIR filter with CSD coefficients},
	journal = {IJCA Proceedings on International Conference on Innovations in Information, Embedded and Communication Systems},
	year = {2014},
	volume = {ICIIECS},
	number = {3},
	pages = {15-19},
	month = {November},
	note = {Full text available}


Filtering of ECG signal is very important because noisy ECG signal can mask some important features of the Electrocardiogram (ECG). Hence the filters are necessary to remove this noise for proper analysis of the ECG signal. This paper presents the study of FIR filter using common subexpression elimination techniques for ECG signal Processing. The common subexpression elimination techniques minimize the logic operators (LO) in realizing finite impulse response (FIR) filters. The Canonical Signed Digit (CSD) representation of filter coefficients will increase the common subexpressions which reduces the design complexity. The design examples show that the average reduction of LO achieved using the optimized method is better than the other subexpression techniques. All the techniques are designed and simulated using MATLAB and Modelsim.


  • B. Mamatha1, V. V. S. V. S. Ramachandram, "Design and Implementation of 120 Order FIR Filter Based On FPGA", International Journal of Engineering Sciences & Emerging Technologies, August 2012.
  • M. Potkonjak, M. B. Shrivasta and P. A. Chandrakasan, "Multiple constant multiplications: Efficient and versatile framework and algorithms for exploring common subexpression elimination", IEEE Trans. Computer-Aided Design, vol. 15, no. 2, pp. 151-161, Feb. 1996.
  • Hunsoo Choo, Khurram Muhammad, and Kaushik Roy, "Complexity Reduction of Digital Filters Using Shift Inclusive Differential Coefficients", IEEE Trans. on Signal Processing, vol. 52, No. 6, June 2004.
  • M. Mehendale, S. D. Sherlekar, and G. Venkatesh, "Synthesis of multiplierless FIR filters with minimum number of additions", in Proceedings of IEEE/ACM International Conference on Computer-Aided Design, Los Alamitos, IEEE Computer Society Press, 1995, pp. 668-671.
  • R. I. Hartley, "Subexpression sharing in filters using canonic signed digit multipliers," IEEE Trans. Ckts. Syst. II, vol. 43, pp. 677-688, Oct. 1996.
  • M. M. Peiro, E. I. Boemo, and L. Wanhammar, "Design of high-speed multiplierless filters using a nonrecursive signed common subexpression algorithm," IEEE Trans. Ckts. Syst. II, vol. 49, no. 3, pp. 196-203, March 2002.
  • Marcos Martínez-Peiró, Eduardo I. Boemo, and Lars Wanhammar, Member, IEEE "Design of High-Speed Multiplierless Filters Using a Non-recursive Signed Common Subexpression Algorithm", IEEE Trans. On Circuits And Systems—Ii: Analog and Digital Signal Processing, vol. 49, No. 3, March 2002.
  • R. Pasko, P. Schaumont, V. Derudder, S. Vernalde, and D. Durackova, "A new algorithm for elimination of common subexpressions," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 18, no. 1, pp. 58-68 (January 1999).
  • N. C. Senthilkumar, Dr. E. Logashanmugam, "Design and Implementation of Low Power and Low area FIR Filter Using CSM Architecture", International Journal of Innovative Research & Studies, June, 2013
  • Y. Jang, S. Yang, "Low-power CSD linear phase FIR filter structure using vertical common sub-expression", Electron. Lett. 38 (15) 777–779 (July 2002).
  • A. P. Vinod, E. M. -K. Lai, A. B. Premkumar, C. T. Lau, "FIR filter implementation by efficient sharing of horizontal and vertical common subexpressions", Electron. Lett. 39 (2) 251–253 (January 2003).
  • Y. Takahashi, M. Yokoyama, "New cost-effective VLSI implementation of multiplierless FIR filter using common subexpression elimination", in: Proceedings of International Symposium on Circuits and Systems, vol. 2, Kobe, Japan, pp. 1445–1448 ( May 2005).
  • A. P. Vinod, EdmundLai , DouglasL. Maskell, P. K. Meher, "An improved common subexpression elimination method for reducing logic operators in FIR filter implementations without increasing logic depth", INTEGRATION, the VLSI journal 43. pp. 124–13 (2010).
  • Prakruti J. Joshi, Vivek P. Patkar, Akshay B. Pawar, Prasad B. Patil, Prof. Bagal U. R. , Prof. Bipin D. Mokal,m "ECG Denoising Using MATLAB", International Journal of Scientific & Engineering Research, Volume 4, Issue 5, May-2013.
  • Aung Soe Khaing and Zaw Min Naing, "Quantitative Investigation of Digital Filters in Electrocardiogram with Simulated Noises", International Journal of Information and Electronics Engineering, Vol. 1, No. 3, November 2011.