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Reseach Article

Implementing an application of Data Acquisition System using NIOS –II Soft core Processor

Published on October 2014 by Sachin K. Meshram, and Aditya M Gulkotwar
International Conference on Quality Up-gradation in Engineering, Science and Technology
Foundation of Computer Science USA
ICQUEST - Number 2
October 2014
Authors: Sachin K. Meshram, and Aditya M Gulkotwar
0ba54a29-3e5b-43ca-9d60-02f921402c10

Sachin K. Meshram, and Aditya M Gulkotwar . Implementing an application of Data Acquisition System using NIOS –II Soft core Processor. International Conference on Quality Up-gradation in Engineering, Science and Technology. ICQUEST, 2 (October 2014), 4-6.

@article{
author = { Sachin K. Meshram, and Aditya M Gulkotwar },
title = { Implementing an application of Data Acquisition System using NIOS –II Soft core Processor },
journal = { International Conference on Quality Up-gradation in Engineering, Science and Technology },
issue_date = { October 2014 },
volume = { ICQUEST },
number = { 2 },
month = { October },
year = { 2014 },
issn = 0975-8887,
pages = { 4-6 },
numpages = 3,
url = { /proceedings/icquest/number2/18692-1533/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Proceeding Article
%1 International Conference on Quality Up-gradation in Engineering, Science and Technology
%A Sachin K. Meshram
%A and Aditya M Gulkotwar
%T Implementing an application of Data Acquisition System using NIOS –II Soft core Processor
%J International Conference on Quality Up-gradation in Engineering, Science and Technology
%@ 0975-8887
%V ICQUEST
%N 2
%P 4-6
%D 2014
%I International Journal of Computer Applications
Abstract

This paper represents an application of data acquisition system. Its design is based on NIOS II soft core processor. The design is proposed to create and manage the interconnected systems of analog signal to digital embedded platform. NIOS II is a versatile embedded processor that presents high performance and has been created on FPGA. Paper provides the creation of ADC managing block with small involvement of processor hence the complexity reduces and speed up the system performances. Also the proposed deign can added to the other system which requires analog signal.

References
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Index Terms

Computer Science
Information Sciences

Keywords

Altera Cyclone Ii Fpga Nios Ii Soft Core Processor Sopc Builder.