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FPGA Implementation of New Generation Block Cipher

Published on None 2011 by Sita Radhakrishnan, Dhanusha P B, Shyamraj R
journal_cover_thumbnail
International Conference on VLSI, Communication & Instrumentation
Foundation of Computer Science USA
ICVCI - Number 15
None 2011
Authors: Sita Radhakrishnan, Dhanusha P B, Shyamraj R
0a8497a0-563d-4299-a310-4d142202cb41

Sita Radhakrishnan, Dhanusha P B, Shyamraj R . FPGA Implementation of New Generation Block Cipher. International Conference on VLSI, Communication & Instrumentation. ICVCI, 15 (None 2011), 35-38.

@article{
author = { Sita Radhakrishnan, Dhanusha P B, Shyamraj R },
title = { FPGA Implementation of New Generation Block Cipher },
journal = { International Conference on VLSI, Communication & Instrumentation },
issue_date = { None 2011 },
volume = { ICVCI },
number = { 15 },
month = { None },
year = { 2011 },
issn = 0975-8887,
pages = { 35-38 },
numpages = 4,
url = { /proceedings/icvci/number15/2770-1688/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Proceeding Article
%1 International Conference on VLSI, Communication & Instrumentation
%A Sita Radhakrishnan
%A Dhanusha P B
%A Shyamraj R
%T FPGA Implementation of New Generation Block Cipher
%J International Conference on VLSI, Communication & Instrumentation
%@ 0975-8887
%V ICVCI
%N 15
%P 35-38
%D 2011
%I International Journal of Computer Applications
Abstract

The demand for efficient and secure ciphers has given rise to a new generation of block ciphers capable of providing increased protection at lower cost. Among these new algorithms is Twofish, a promising 128-bit block cipher that could soon be chosen by the National Institute of Standards and Technology as the Advanced Encryption Standard, replacing DES at the core of many encryption systems worldwide. In this project, a version of Twofish with 192-bit key length will be implemented using VHDL.

References
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Index Terms

Computer Science
Information Sciences

Keywords

AES DES S BLOCK