CFP last date
20 May 2024
Call for Paper
June Edition
IJCA solicits high quality original research papers for the upcoming June edition of the journal. The last date of research paper submission is 20 May 2024

Submit your paper
Know more
The week's pick
Responsive image
Enhancing Privacy Preservation: Multi-Attribute Protection with P-Sensitive K-Anonymity

Twinkle Patel Kiran Amin
Random Articles
Reseach Article

Real-Time Algorithm for the Reduction of THD in Multilevel Inverters

Published on None 2011 by Megha Jess Mathew, T. Chelladurai
journal_cover_thumbnail
International Conference on VLSI, Communication & Instrumentation
Foundation of Computer Science USA
ICVCI - Number 5
None 2011
Authors: Megha Jess Mathew, T. Chelladurai
6d938086-50f7-47b5-8592-f75d7d5b9573

Megha Jess Mathew, T. Chelladurai . Real-Time Algorithm for the Reduction of THD in Multilevel Inverters. International Conference on VLSI, Communication & Instrumentation. ICVCI, 5 (None 2011), 1-7.

@article{
author = { Megha Jess Mathew, T. Chelladurai },
title = { Real-Time Algorithm for the Reduction of THD in Multilevel Inverters },
journal = { International Conference on VLSI, Communication & Instrumentation },
issue_date = { None 2011 },
volume = { ICVCI },
number = { 5 },
month = { None },
year = { 2011 },
issn = 0975-8887,
pages = { 1-7 },
numpages = 7,
url = { /proceedings/icvci/number5/2656-1248/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Proceeding Article
%1 International Conference on VLSI, Communication & Instrumentation
%A Megha Jess Mathew
%A T. Chelladurai
%T Real-Time Algorithm for the Reduction of THD in Multilevel Inverters
%J International Conference on VLSI, Communication & Instrumentation
%@ 0975-8887
%V ICVCI
%N 5
%P 1-7
%D 2011
%I International Journal of Computer Applications
Abstract

Multilevel inverters have been widely applied industries. A family of optimal puisewidth modulation (PWM) methods for multilevel inverters, such as step modulation, can generate output voltage with less harmonic distortion than popular modulation strategies, such as the carrier-based sinusoidal PWM or the space vector PWM. However, some drawbacks limit the application of optimal PWM. One of such crucial drawback is that the optimal switching angles could not be calculated in real-time and one has to rely on lookup tables with precalculated angles. We propose a novel real-time algorithm for calculating switching angles that minimizes total harmonic distortion (THD) for step modulation. We give a mathematical proof that the output voltage has the minimum THD. We implemented the algorithm on a digital signal processor and provide experimental results that verify the performance of the proposed algorithm.

References
  1. J. Rodriguez, J.-S. Lai, and F. Z. Peng, ―Multilevel inverters: A survey of topologies, controls, and applications.‖ IEEE Trans. Ind. Electron., vol. 49, no. 4, pp. 724-738, Aug. 2002.
  2. J. M. Carrasco, L. G. Franquelo, J. T. Bialasiewicz, E. Galvan, R. C. PortilloGuisado, M. A. M. Prats, J. i. Leon, and N. Moreno-Alfonso, ―Power-electronic systems for the grid integration of renewable energy sources: A survey,‖ IEEE Trans. Ind. Electron., vol. 53, no. 4, pp. 1002-1016, Jun. 2006.
  3. X. Xu, Y. Zou, K. Ding, and F. Liu, ―Cascade multilevel inverter with phase-shift SPWM and its application in STATCOM,‖ in Proc. IEEE 1ECON, 2004, vol. 2, pp. 1139-1143.
  4. Y. Liang and C. O. Nwankpa, ―A new type of STATCOM based on cascading voltage-source inverters with phase-shifted unipolar SPWM,‖ IEEE Trans. Ind. Appl., vol. 35, no. 5, pp. 1118-1123, Sep/Oct. 1999.
  5. J. Rodriguez, J. Pontt, P. Correa, P. Cortes, and C. Silva, ―A new modu-vJ‘lation method to reduce common-mode voltages in multilevel inverters,‖ IEEE Trans. Ind. Electron., vol. 51, no. 4, pp. 834-839, Aug. 2004.
  6. S. Lakshminarayanan, G. Mondal, P. N. Tekwani, K. K. Mohapatra, Sn*^ and K. Gopakumar, ―Twelve-sided polygonal voltage space vector based multilevel inverter for an induction motor drive with common-mode voltage elimination,‖ IEEE Trans. Ind. Electron., vol. 54, no. 5, pp. 276i-2768, Oct. 2007.
  7. S. Sirisukprasert, J.-S. Lai, and T.-H. Liu, ―Optimum harmonic reduction with a wide range of modulation indexes for multilevel converters,‖ IEEE Trans. Ind. Electron., vol. 49, no. 4, pp. 875-881, Aug. 2002.
  8. L. M. Tolbert, F. Z. Peng, and T. G. Habetler, ―Multilevel converters for large electric drives,‖ IEEE Trans. Ind. Appl., vol. 35, no. 1, pp. 36-44, ,Jan./Feb. 1999.
  9. C. Rech and J. R. Pinheiro, ―Hybrid multilevel converters: Unified analysis and design considerations,‖ IEEE Trans. Ind. Electron., vol. 54, no. 2, pp. 1092-1104, Apr. 2007.
  10. Y. Liu and F. Luo, ‗Trinary hybrid multilevel inverter used in STATCOM with unbalanced voltages,‖ Proc. Inst. Electr. Eng.—Elect. Power Appl., vol. 152, no. 5, pp. 1203-1222, Sep. 2005.
  11. L. Li, D. Czarkowski, L. Yaguang, and P. Pi! Jay, ―Multileve^selective harmonic elimination PWM technique in series-connected voltage inverters,‖ IEEE Trans. Ind. Appl., vol. 36, no. 1, pp. 160-170, JanVFeb. 2000.
  12. Y. Liu, Z. Du, A. Q. Huang, and S. Bhattacharya, ―An optimal combination modulation strategy for a seven-level cascade multilevel converter based STATCOM,‖ in Conf. Rec. IEEE IAS Annu. Meeting, Oct. 2006, —. pp. 1732-1737.
  13. J. N. Chiasson, L. M. Tolbert, K. J. McKenzie, and Z. Du, ―Elimination of harmonics in a multilevel converter using the theory of symmetric polynomials and resultants,‖ IEEE Trans. Control Syst. Technol., vol. 13, no. 2, pp. 216-223, Mar. 2005.
  14. B. Ozpineci, L. M. Tolbert, and J. N. Chiasson, ―Harmonic optimization of multilevel converters using genetic algorithms,‖ IEEE Power Electron. Lett., vol. 3, no. 3, pp. 92-95, Sep. 2005.
Index Terms

Computer Science
Information Sciences

Keywords

Multilevel inverter optimal puisewidth modulation (PWM) power conversion Total Harmonic Distortion (THD) Digital Signal Processing (DSP)