Digital demodulators are characterized by their flexibility: just by software replacement or modification it is possible to change completely its functionality. The objective of this project is to built a FPGA based fully digitized FM demodulator. A digital tuning function can be implemented by using Digital Down Converter (DDC) on FPGA board [3]. This receiver consist of a simple analog RF front end, an analog to digital converter, a FPGA chip and Digital to Analog converter.

1. Graychip DDC & DUC: www.ti.com/ Graychip
2. Interfile DDC & DUC: www.intersil.com.
3. RF Design, July 2003, “Multichannel Multiband VHF Software Radio Based Receiver Eliminates RF Downconversion.”
4. ICS Tech Note No. 45: “ICS-554: 4-Channel, 14- Bit, 105 MHz PMC ADC Board with Down-Converters and Xilinx FPGA
5. ICS Tech Note No. 46: “The ICS-564 4-Channel, 14-Bit, 200 MHz DAC PMC Module With Integrated Digital Upconverter and PCI 64/66 Interface.”
6. ICS Tech Note No. 48: “The ICS-572 a 2-Channel ADC,2-Channel DAC, With Xilinx FPGA, SDRAM, QDR SRAM And PCI 64/66 Interface.”
7. ICS Application Note (AN-SR-7): “The Next Generation Software Radio Modules.”
8. ICS Application Note (AN-SR-13): “Acquisition and FPGA based processing of Wideband Radio Signals in one PCI bus slot.”
9. ICS Application Note (AN-SR-13): “Acquisition and FPGA based processing of Wideband Radio Signals in one PCI bus slot.”
10. ICS Application Note (AN-SR-15): “Building a Versatile Low Latency Cognitive Radio for Multimission Applications with the ICS-572.”
11. ICS Application Note (AN-SR-15): “Building a Fast Frequency Hopped Radio with Zero Latency.”
12. FPGAs for SDR

Digital Down converter CODEC NCO Coordinate Rotation Digital Computer (CORDIC) UART