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Review of Junctionless transistor using CMOS technology and MOSFETs

Published on March 2012 by Shridhar R. Sahu
2nd National Conference on Innovative Paradigms in Engineering and Technology (NCIPET 2013)
Foundation of Computer Science USA
NCIPET - Number 4
March 2012
Authors: Shridhar R. Sahu
643cc346-1a06-4e19-a51b-8ff2e8e2adb2

Shridhar R. Sahu . Review of Junctionless transistor using CMOS technology and MOSFETs. 2nd National Conference on Innovative Paradigms in Engineering and Technology (NCIPET 2013). NCIPET, 4 (March 2012), 8-11.

@article{
author = { Shridhar R. Sahu },
title = { Review of Junctionless transistor using CMOS technology and MOSFETs },
journal = { 2nd National Conference on Innovative Paradigms in Engineering and Technology (NCIPET 2013) },
issue_date = { March 2012 },
volume = { NCIPET },
number = { 4 },
month = { March },
year = { 2012 },
issn = 0975-8887,
pages = { 8-11 },
numpages = 4,
url = { /proceedings/ncipet/number4/5215-1027/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Proceeding Article
%1 2nd National Conference on Innovative Paradigms in Engineering and Technology (NCIPET 2013)
%A Shridhar R. Sahu
%T Review of Junctionless transistor using CMOS technology and MOSFETs
%J 2nd National Conference on Innovative Paradigms in Engineering and Technology (NCIPET 2013)
%@ 0975-8887
%V NCIPET
%N 4
%P 8-11
%D 2012
%I International Journal of Computer Applications
Abstract

Transistors are the fundamental building blocks of modern electronic devices and all existing transistors contain semiconductor junctions. Junctionless transistor is a uniformly doped nanowire without junctions with a wrap-around gate. As the distance between junctions in modern devices drops below 10nm, extraordinarily high doping concentration gradients become necessary. Junctionless transistors could therefore help chipmakers continue to make smaller devices. Here, in this paper presented a new type of transistor in which there are no junctions and no doping concentration gradients. They have near-ideal sun threshold slope, extremely low leakage currents, and less degradation of mobility with gate voltage and temperature than classical transistors.

References
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Index Terms

Computer Science
Information Sciences

Keywords

Gated resistor Junctionless transistor Silicon nanowire FET Ebeam lithography and AFM