CFP last date
22 April 2024
Reseach Article

High Performance Op Amp Design � Review

Published on March 2012 by Rajashri Deshmukh, Deepak Dandekar
2nd National Conference on Innovative Paradigms in Engineering and Technology (NCIPET 2013)
Foundation of Computer Science USA
NCIPET - Number 6
March 2012
Authors: Rajashri Deshmukh, Deepak Dandekar
9b915296-6e5d-4473-9a23-05fd9087d4b0

Rajashri Deshmukh, Deepak Dandekar . High Performance Op Amp Design � Review. 2nd National Conference on Innovative Paradigms in Engineering and Technology (NCIPET 2013). NCIPET, 6 (March 2012), 5-8.

@article{
author = { Rajashri Deshmukh, Deepak Dandekar },
title = { High Performance Op Amp Design � Review },
journal = { 2nd National Conference on Innovative Paradigms in Engineering and Technology (NCIPET 2013) },
issue_date = { March 2012 },
volume = { NCIPET },
number = { 6 },
month = { March },
year = { 2012 },
issn = 0975-8887,
pages = { 5-8 },
numpages = 4,
url = { /proceedings/ncipet/number6/5230-1042/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Proceeding Article
%1 2nd National Conference on Innovative Paradigms in Engineering and Technology (NCIPET 2013)
%A Rajashri Deshmukh
%A Deepak Dandekar
%T High Performance Op Amp Design � Review
%J 2nd National Conference on Innovative Paradigms in Engineering and Technology (NCIPET 2013)
%@ 0975-8887
%V NCIPET
%N 6
%P 5-8
%D 2012
%I International Journal of Computer Applications
Abstract

In a never-ending effort to reduce power consumption and gate oxide thickness, the integrated circuit industry is constantly developing smaller power supplies. Furthermore, in an effort to reduce costs and integrate analog and digital circuits onto a single chip, MOS devices are used in the weak inversion region or the subthreshold inversion region to minimize dc source power. A feasible configuration for high gain, low power op amp design utilizing subthreshold operation along with active operation is proposed. This paper discusses and compares the existing compensation methods for operational amplifiers. In this paper comparison is made between different methodologies of op amp design , such as Nested Miller Compensation Method, Feedforward Compensation technique. Two stage and Three stage op amp using Nested Miller Compensation method, adaptive biasing CMOS op-amp with enhanced DC gain ,Three stage op amp using Indirect Compensation technique. The comparison table 1, shows that the nested miller compensation method provides a high gain of 114.3 dB, high uniy gain bandwidth of 103Mhz, and the low power consumption of about (< 3 mW) ,As compared to the other methods. And feedforward compensation method is also have a low power consumption of upto 18 mW, and it requires a low power suppy of 1.2V.

References
  1. Maneesh Menon, Karan Dhall, Anu Gupta, Nitin Chaturvedi, "Low Power Cascaded Three Stage Amplifier with Multipath Nested Miller Compensation," itc, pp.9-12, 2010 International Conference on Recent Trends in Information, Telecommunication and Computing, 2010
  2. Hitesh Shrimali and Shouri Chatterjee, “11 GHz UGBW op amp with feed forward compensation technique,” Department of Electrical Engineering IIT, Delhi
  3. Anshu Gupta D.K. Mishra, R. Khattri,” A Two Stage and Three Stage CMOS OPAMP with Fast Settling, High DC Gain and Low Power Designed in 180nm Technology,” Electronic and Instrumentation Dept. SGSITS, Indore Indore, India. 2010 International Conference on Computer Information Systems and Industrial Management Applications (CISIM)
  4. Vito Giannini, Andrea Baschirotto,” A low power adaptive biasing CMOS op amp with enhanced DC gain,” Dep. of Innovation Engineering University of Lecce. 1-4244-0157-7/06/$20.00 p2006 IEEE
  5. J. Ramos, X. Peng, M. Steyaert, and W. Sansen, "Three stage amplifier frequency compensation," in Proceedings of the European Solid-State Circuits Conference, ESSCIRC, Sept. 2003, pp. 365?36
  6. H. Ma and F. Zhou, "Nested Miller active-capacitor frequency compensation for low-power three-stage amplifiers," in IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC, Dec. 2008, pp. 1--4.
  7. Saxena, V. and Baker R.J., "Compensation of CMOS Op-Amps using Split-Length Transistors," Proceedings of the 51st Midwest Symposium on Circuits and Systems, pp. 109-112, August 10-13, 2008.
  8. D. T. Comer, D. J. Comer, and L. Li, “A high-gain CMOS op amp using composite cascode stages,” International Journal of Electronics, vol. 97, pp. 637-646, June 2010
  9. B. Razavi, Design of analog CMOS integrated circuits, McGraw-Hill, 2000
  10. Fan, X., Mishra, C., Sanchez-Sinencio, "Single Miller capacitor frequency compensation technique for low-power multistage amplifiers," IEEE J. Solid State Circuits, vol. 40, no. 3, pp. 584-592, March 2005.
Index Terms

Computer Science
Information Sciences

Keywords

multi-stage amplifier frequency compensation high gain low power consumption