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Design of Reconfigurable Multiprocessor Architecture for Embedded System

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IJCA Proceedings on National Conference on Recent Trends in Information Security
© 2015 by IJCA Journal
NCRTIS 2015 - Number 1
Year of Publication: 2015
Authors:
Archana Gomkar

Archana Gomkar. Article: Design of Reconfigurable Multiprocessor Architecture for Embedded System. IJCA Proceedings on National Conference on Recent Trends in Information Security NCRTIS 2015(1):14-18, April 2015. Full text available. BibTeX

@article{key:article,
	author = {Archana Gomkar},
	title = {Article: Design of Reconfigurable Multiprocessor Architecture for Embedded System},
	journal = {IJCA Proceedings on National Conference on Recent Trends in Information Security},
	year = {2015},
	volume = {NCRTIS 2015},
	number = {1},
	pages = {14-18},
	month = {April},
	note = {Full text available}
}

Abstract

Embedded systems are the brains of today's most digital and industrial control systems. In systems where more than one processor is incorporated, the need for multiprocessor communication often arises. It fully utilizes microcontroller features & embedded technology concepts to minimize the complications of digital gates, size and cost too.

References

  • Atmel ATmega32 and ATmega16 Datasheets. Rev. 2503H-03/05. Accessed March 2006. http://www. atmel. com/products/avr/
  • aOS – a RTOS for AVR. Accessed March 2006. http://www. tietomyrsky. fi/projektit/aos/
  • The Message Passing Interface (MPI) Standard. Accessed March 2006. http://www-unix. mcs. anl. gov/mpi
  • MPI-2: Extensions to the Message-Passing Interface. Accessed March 2006.
  • Hennessy, John L. and Patterson, David A. Computer Architecture: A Quantitative Approach, 3rd ed. Morgan Kaufmann 2003.
  • Peterson, Larry L. and Davie, Bruce S. Computer Networks: A Systems Approach, 3rd ed. Morgan Kaufmann 2003.
  • A preemptive multitasking, OS for Atmel Mega32 microcontrollers. Accessed March 2006. http://instruct1. cit. cornell. edu/courses/ee476/RTOS/index. html
  • Benny Akesson. Predictable and Composable System-on-Chip Memory Controllers. PhD thesis, Eindhoven University of Technology, February 2010. ISBN: 978-90-386-2169-2.
  • Benny Akesson, Kees Goossens, and Markus Ringhofer. Predator: A Predictable SDRAM Memory Controller. In Int'l Conference on Hardware/Software Codesign and System Syn-thesis (CODES+ISSS), pages 251{256. ACM Press New York, NY, USA, September 2007.
  • G. Cote, B. Erol, M. Gallant, and F. Kossentini. H. 263+: video coding at low bit rates. Circuits and Systems for Video Technology, IEEE Transactions on, 8(7):849 {866, nov 1998.
  • Bernd Girod. Digital images and human vision. chapter What's wrong with mean-squared error?, pages 207{220. MIT Press, Cambridge, MA, USA, 1993.
  • K. Goossens, J. Dielissen, and A. Radulescu. Aethereal network on chip: concepts, archi-tectures, and implementations. Design Test of Computers, IEEE, 22(5):414-421, sept. -oct. 2005.
  • K. Goossens and A. Hansson. The ethereal network on chip after ten years: Goals, evolution, lessons, and future. In Design Automation Conference (DAC), 2010 47th ACM/IEEE, pages306 -311, june 2010.