CFP last date
22 April 2024
Reseach Article

Design and Realization of FPGA based Off-Chip Trained MLP for Classical XOR Problem and Need of On-Chip Training

Published on November 2012 by K. Packia Lakshmi, M. Subadra
International Conference on Electronics, Communication and Information systems
Foundation of Computer Science USA
ICECI - Number 2
November 2012
Authors: K. Packia Lakshmi, M. Subadra
8889652d-b454-4b0d-b5cc-54f9c79c6563

K. Packia Lakshmi, M. Subadra . Design and Realization of FPGA based Off-Chip Trained MLP for Classical XOR Problem and Need of On-Chip Training. International Conference on Electronics, Communication and Information systems. ICECI, 2 (November 2012), 7-12.

@article{
author = { K. Packia Lakshmi, M. Subadra },
title = { Design and Realization of FPGA based Off-Chip Trained MLP for Classical XOR Problem and Need of On-Chip Training },
journal = { International Conference on Electronics, Communication and Information systems },
issue_date = { November 2012 },
volume = { ICECI },
number = { 2 },
month = { November },
year = { 2012 },
issn = 0975-8887,
pages = { 7-12 },
numpages = 6,
url = { /specialissues/iceci/number2/9466-1013/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Special Issue Article
%1 International Conference on Electronics, Communication and Information systems
%A K. Packia Lakshmi
%A M. Subadra
%T Design and Realization of FPGA based Off-Chip Trained MLP for Classical XOR Problem and Need of On-Chip Training
%J International Conference on Electronics, Communication and Information systems
%@ 0975-8887
%V ICECI
%N 2
%P 7-12
%D 2012
%I International Journal of Computer Applications
Abstract

The main intension of this work is to present the importance of neural chip with learning capability. The designed sequentially trained MLP structure is used to solve the classical XOR problem and the structure is realized on FPGA device environment. By comparing the device utilization summary for the design in different families of Xilinx FPGA, the importance of platform selection for hardware implementation is presented. Finally the importance of on-chip learning is emphasized.

References
  1. M. Gopal. "Digital Control And Static Variable Methods", Tata McGraw Hill, New Delhi, 1997.
  2. Sathish Kumar, "Neural Networks: A Classroom Approach", Tata McGraw-Hill Publishing Company Limited, New Delhi, 2004.
  3. S. N. Sivanandam, Sumathi, Deepa. m, "Introduction to Neural Networks Using Matlab 6. 0", Tata McGraw-Hill, ISBN 0-07-059112-1.
  4. Jagath C. Rajapakse, Amos R. Omondi, "FPGA implementation of Neural Networks". ISBN-10 0-387-28487-7 ( e-book) @2006 Sprinker.
  5. David E. Rumelhart, Yves Chauvin, "BackPropagation: Theory, Architectures, and Applications", google preview.
  6. Martin T. Hagan, Howard B. Demuth, and Mark Beale, "Neural Network Design", Thomson Learning, New Delhi,2003,.
  7. J. Bhaskar, "VHDL Primer", P T R Prentice Hall.
  8. Volnei A. Pedroni, "Circuit Design with VHDL", ISBN 0-262-16224-5,Library of Congress Cataloging-in-Publication Data.
  9. R. Hunt,L. Lipsman, M. Rosenber, "A Guide to MATLAB for Beginners and Experienced Users", Cambridge University Press, ISBN-I3 978-0-511-07792-0 eBook.
  10. Simon Haykin, "Neural Networks: A Comprehensive Foundation", 2ed. , Addison Wesley Longman (Singapore) Private Limited, Delhi, 2001.
  11. Antonio de Padua Braga, Tiago Mendonca Dasilva, Willian Soares Lacerda, "Pipelined on-line Back-propagation training of an artificial neural network on a parallel multiprocessor system", Learning and Nonlinear Module(L&NLM)-Journal of the Brazillian Society on Neural Networks, Vo1. 8,I. No. 2,P. No. 120-123,2010.
  12. Himavathu. s, Muthuramalingam. A, Srinivasan. E, "Neural Network Implementation Using FPGA: Issues and Application" World Academy of Science, Engineering and Technology,I. No. 48, P. No. 625-631,2008.
  13. Rafid Ahmed Khalil, "Hardware Implementation of Back propagation Neural Networks on Field programmable Gate Array(FPGA)", Al-Rafidain Engineering,Vol. 16,No. 3,Aug. 2008.
  14. Alexander Gomperts, Aghisek Ukil, " Development and Implemenation of Parameterized FPGA-Based General Purpose Neural Networks for Online Applications", IEEE Transaction on industrial informatics, Vol. 7,No. 1,Feb. 2011.
  15. Mark Pethick, Michael Liddle, Paul Werstein, and Zhiyi Huang , "Parallelization of a Backpropagation Neural Network on a Cluster Computer", 15th IASTED International Conference on Parallel and Distributed Computing and Systems,P. No. 574-582, 2003.
  16. Zhu and Sutton. P, "FPGA implementation of Neural Networks: A Survey of a Decade of Progress", Lecture Notes in Computer Science,Vol. 2778/2003, P. No. 1062-1066,2003
  17. Yihua Liao, "Neural Network In Hardware-Survey", http://bit. csc. lsu. edu/~jianhua/shiv2. pdf,liaoy@cs. ucdavis. edu,
  18. http://alexandria. tue. nl/repository/books/644229. pdf
  19. http://business. highbeam. com/articles/436704/internatio-nal-journal-information-technology.
Index Terms

Computer Science
Information Sciences

Keywords

Ann Fpga Mlp Off-chip Learning On-chip Learning