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Reseach Article

Low Power 10-Bit Digital-to-Analog Converter in 0.35um Technology

Published on February 2013 by G. Raja Hari, S. C. Bose
International Conference on Electronic Design and Signal Processing
Foundation of Computer Science USA
ICEDSP - Number 1
February 2013
Authors: G. Raja Hari, S. C. Bose
76f06dc9-94cc-4d93-9da4-376b636cdccf

G. Raja Hari, S. C. Bose . Low Power 10-Bit Digital-to-Analog Converter in 0.35um Technology. International Conference on Electronic Design and Signal Processing. ICEDSP, 1 (February 2013), 17-20.

@article{
author = { G. Raja Hari, S. C. Bose },
title = { Low Power 10-Bit Digital-to-Analog Converter in 0.35um Technology },
journal = { International Conference on Electronic Design and Signal Processing },
issue_date = { February 2013 },
volume = { ICEDSP },
number = { 1 },
month = { February },
year = { 2013 },
issn = 0975-8887,
pages = { 17-20 },
numpages = 4,
url = { /specialissues/icedsp/number1/10348-1006/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Special Issue Article
%1 International Conference on Electronic Design and Signal Processing
%A G. Raja Hari
%A S. C. Bose
%T Low Power 10-Bit Digital-to-Analog Converter in 0.35um Technology
%J International Conference on Electronic Design and Signal Processing
%@ 0975-8887
%V ICEDSP
%N 1
%P 17-20
%D 2013
%I International Journal of Computer Applications
Abstract

In this paper the design of a low power 10-bit segmented current steering DAC for instrumentation applications is presented. The static performance of segmented DAC depends upon the matching of current sources. The layout and switching scheme of current sources of the DAC is proposed to reduce the mismatch between the current sources for better accuracy and glitch while switching respectively. The prototype is fabricated in 0. 35um two-poly three-metal CMOS technology and measurement results show maximum DNL of +0. 45/-0. 326 LSB and integral non-linearity INL of +1. 085/-0. 7836 LSB for 3. 3v supply voltage. The total power consumption of the DAC is 3. 39mW and core area of the DAC is 0. 52mm2.

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Index Terms

Computer Science
Information Sciences

Keywords

Dac Inl Dnl Current Steering Segmented Architecture