The week's pick
Reseach Article
Design of Real Time Multiprocessor System on Chip
| International Journal of Computer Applications |
| Foundation of Computer Science (FCS), NY, USA |
| Volume 1 - Number 24 |
| Year of Publication: 2010 |
| Authors: V.V.Mane, U.L.Bombale |
10.5120/562-739
|
V.V.Mane, U.L.Bombale . Design of Real Time Multiprocessor System on Chip. International Journal of Computer Applications. 1, 24 ( February 2010), 26-28. DOI=10.5120/562-739
Abstract
Actually, multiprocessor architecture is one of the solutions to fulfill the heavy computational requirements of the new applications running on embedded systems such multimedia and 3D games. The design of such systems pose various problems located at different level: architecture topology, lack of multiprocessor RTOS. Hence, we suggest in this paper a new topology of multiprocessor architecture as well as a generic layer of inter-processor communication which allows the adaptation of the single processor operating systems to multiprocessor architectures.
References
- Bambha, N. Kianzad, V., Khandelia, and. Bhattacharrya, "Intermediate Representations for Design Automation of Multiprocessor DSP Systems. Itn Design for Automation Design Automation for Embedded Systems, Multiprocessorvol. 7, DSP307- 323 Kluwer Academic Publishers, 2002.I. Stoica, R. Morris, D. Karger, F. Kaashoek, and H. Balakrishnan, "Chord: A Scalable Peer-to-Peer Lookup Service for Internet Applications," Proc. ACM SIGCOMM '01, pp. 149-160, 2001.
- L.Wang and. N. Marnjikian. "A performance study of chip multiprocessors with integrated dramr'. In Proc. 2003 Symp. on Perf. Eval. of Computer and. Telecommunications Systems Montreal Quebec, July 2003.
- N. Manjikian. "Multiprocessor enhancements of the SimpleScalar tool set ACM Computer architecture News, 29(l):8-157 March 2001.
- Le Moigne, R. Pasquier, 0. Calvez, J.-P. "A generic RTOS model for real-time systerms simulation with systermC', Design, Automation and Test in Europe Conference and Exhibition, Feb. 2004.
- D. Shin and J. Kim. "Power-Aware Scheduling of Conditional Task Graphs in Real-Time Multiprocessor Systems. In Proc". International Symposium on Low Power Electronics and Design (ISLPED), August 2003.
- MDARTS: "A Multiprocessor Database Architecture for Hard Real-Time Systems" IEEE transactions on knowledge and data engineering, VOL. 12, NO. 4, JULY/AUGUST 2000.
- "Conception d'un systeme a haute performance, le calcul parallele" ,CETMEF 2004. Amer BAGHDADI: "Exploration et conception systematiqued 'architectures multiprocesseurs monopuces dediees a des applications specifiques"these PhD, TIMA France.
Index Terms
Keywords